I am a PhD student interested in more productive methods for creating FPGA designs and ASICs for the datacenter.
- Fleet: A Framework for Massively Parallel Streaming on FPGAs ASSOC COMPUTING MACHINERY. 2020: 639–51
Creating an Agile Hardware Design Flow
View details for Web of Science ID 000628528400063
- TASO: Optimizing Deep Learning Computation with Automatic Generation of Graph Substitutions ASSOC COMPUTING MACHINERY. 2019: 47–62