Bio


Dante Gabriel Muratore received the B.S. degree and the M.S. degree in Electrical Engineering from Politecnico of Turin in 2012 and 2013, respectively. He received the Ph.D. degree in Microelectronics from University of Pavia in 2017. From 2015 to 2016 he was a Visiting Scholar at MTL labs at the Massachusetts Institute of Technology. Since 2017 he is a Postdoctoral Fellow at Stanford University. He is the recipient of the Wu Tsai Neurosciences Institute Interdisciplinary Scholar Award. His research focuses on hardware design for massively parallel brain-machine interfaces, mixed-signal data processing, bioelectronics, sensor interfaces and machine learning.

Professional Education


  • Doctor of Philosophy, Universita Degli Studi Di Pavia (2017)

2019-20 Courses


All Publications


  • Power-saving design opportunities for wireless intracortical brain-computer interfaces. Nature biomedical engineering Even-Chen, N., Muratore, D. G., Stavisky, S. D., Hochberg, L. R., Henderson, J. M., Murmann, B., Shenoy, K. V. 2020

    Abstract

    The efficacy of wireless intracortical brain-computer interfaces (iBCIs) is limited in part by the number of recording channels, which is constrained by the power budget of the implantable system. Designing wireless iBCIs that provide the high-quality recordings of today's wired neural interfaces may lead to inadvertent over-design at the expense of power consumption and scalability. Here, we report analyses of neural signals collected from experimental iBCI measurements in rhesus macaques and from a clinical-trial participant with implanted 96-channel Utah multielectrode arrays to understand the trade-offs between signal quality and decoder performance. Moreover, we propose an efficient hardware design for clinically viable iBCIs, and suggest that the circuit design parameters of current recording iBCIs can be relaxed considerably without loss of performance. The proposed design may allow for an order-of-magnitude power savings and lead to clinically viable iBCIs with a higher channel count.

    View details for DOI 10.1038/s41551-020-0595-9

    View details for PubMedID 32747834

  • A Data-Compressive Wired-OR Readout for Massively Parallel Neural Recording Muratore, D. G., Tandon, P., Wootters, M., Chichilnisky, E. J., Mitra, S., Murmann, B., IEEE IEEE. 2019
  • Sound Classification Using Summary Statistics and N-Path Filtering Villamizar, D., Battaglino, D., Muratore, D. G., Hoshyar, R., Murmann, B. S., IEEE IEEE. 2019
  • High-Resolution Time-Interleaved Eight-Channel ADC for Li-Ion Battery Stacks IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS Muratore, D., Bonizzoni, E., Verri, S., Maloberti, F. 2017; 64 (6): 620–24
  • A Pipeline ADC for Very High Conversion Rates Muratore, D., Bonizzoni, E., Maloberti, F., IEEE IEEE. 2016: 1446–49
  • A Capacitive Sensor Interface for High-Resolution Acquisitions in Hostile Environments Muratore, D., Bonizzoni, E., Maloberti, F., Fiocchi, C., Julian, P., Andreou, A. G. IEEE. 2016: 167–70
  • Very High-Speed CMOS Comparators for multi-GS/s A/D Converters Muratore, D., Akdikmen, A., Maloberti, F., IEEE IEEE. 2015: 240–43
  • A Split Transconductor High-Speed SAR ADC Muratore, D., Bonizzoni, E., Maloberti, F., IEEE IEEE. 2015: 2433–36