Bio

Guénolé Lallement received the M.Sc. degree (Hons.) in analog and digital IC design from Imperial College London, London, U.K., in 2016, and the Engineering Diploma degree in electronic and computer science from Télécom ParisTech, Paris, France. In 2019, he completed his Ph.D. degree with the IM2NP Institute, Aix-Marseille University and STMicroelectronics, Crolles, France, under the co-supervision of Prof. J.-L. Autran and Dr. F. Abouzeid.

At Imperial College London and under the supervision of Dr. P. Georgiou, he worked on creating bio-inspired CMOS DNA microarray. This project received the Hertha Ayrtan Centenary Prize for the best M.Sc. project with significant original contribution to the topic area. His thesis research interests include the extension of SoCs mission capabilities by offering near-zero-power performances and enabling continuous functionality for IoT systems.

In 2020, he started a postdoctoral position at Stanford with Prof. Subhasish Mitra and Prof. Boris Murmann. His research focuses on system-level design and optimal computing organization - 3D vs 2D - for specific computing domains using emerging technologies.

Honors & Awards

  • MSc - Award of Distinction, Imperial College - Dept. of Electronic and Electrical Engineering. (2015)
  • Hertha Ayrton Centenary Prize, Imperial College - Dept. of Electronic and Electrical Engineering. (2015)

Professional Education

  • Doctor of Philosophy (Ph.D.), Aix-Marseille Université, Electrical Engineering (2019)
  • Master of Science (MSc.), Imperial College London, Electrical Engineering (2015)
  • Master of Science (Dipl. Ing.), Télécom Paris, Electrical and Computer Engineering (2015)

Stanford Advisors

Contact

  • Academic
    guenole@stanford.edu
    University - Scholar Department: Electrical Engineering Position: Postdoctoral Scholar

Additional Info

  • Mail Code: 9505

Links

All Publications

  • A 2.7 pJ/cycle 16 MHz, 0.7 mu W Deep Sleep Power ARM Cortex-M0+Core SoC in 28 nm FD-SOI IEEE JOURNAL OF SOLID-STATE CIRCUITS Lallement, G., Abouzeid, F., Cochet, M., Daveau, J., Roche, P., Autran, J. 2018; 53 (7): 2088–2100

    View details for DOI 10.1109/JSSC.2018.2821167

    View details for Web of Science ID 000436927800019

  • On-Chip Total Ionizing Dose Digital Monitor in Fully Depleted SOI Technologies Abouzeid, F., Gasiot, G., Soussan, D., de Boissac, C., Malherbe, V., Bertin, V., Lallement, G., Autran, J., Roche, P. IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC. 2020: 1326–31

    View details for DOI 10.1109/TNS.2020.2994435

    View details for Web of Science ID 000550669800014

  • A 140 nW, 32.768 kHz, 1.9 ppm/degrees C Leakage-Based Digitally Relocked Clock Reference with 0.1 ppm Long-Term Stability in 28nm FD-SOI Lallement, G., Abouzeid, F., Di Gilio, T., Roche, P., Autran, J., IEEE IEEE. 2018: 197–200

    View details for Web of Science ID 000459847500061

  • Q-Learning-based Adaptive Power Management for IoT System-an-Chips with Embedded Power States Debizet, Y., Lallement, G., Abouzeid, F., Roche, P., Autran, J., IEEE IEEE. 2018

    View details for Web of Science ID 000451218702070

  • A 2.7pJ/cycle 16MHz SoC with 4.3nW Power-Off ARM Cortex-M0+Core in 28nm FD-SOI Lallement, G., Abouzeid, F., Cochet, M., Daveau, J., Roche, P., Autran, J., IEEE IEEE. 2017: 159–62

    View details for Web of Science ID 000426841900040

  • A 0.40 pJ/cycle 981 mu m(2) Voltage Scalable Digital Frequency Generator for SoC Clocking Cochet, M., Clerc, S., Lallement, G., Abouzeid, F., Roche, P., Autran, J., IEEE IEEE. 2017: 69–72

    View details for Web of Science ID 000426511300018

  • Bio-inspired pH sensing using Ion Sensitive Field Effect Transistors Lallement, G., Moser, N., Geondou, P., IEEE IEEE. 2016: 2835–38

    View details for Web of Science ID 000390094702247