Jeff is a Ph.D. candidate at Stanford University in Electrical Engineering advised by Mark Horowitz. His research interests are in building hardware accelerators from software languages. Halide to Hardware is a project to use a data-parallel functional program formerly developed for CPU programs to produce hardware. Through the AHA hardware toolflow, these image processing and deep learning algorithms are mapped to a CGRA. Previously, Jeff received a B.S. in Electrical and Computer Engineering from Cornell University in 2015.
- Interstellar: Using Halide's Scheduling Language to Analyze DNN Accelerators ASSOC COMPUTING MACHINERY. 2020: 369–83
Creating an Agile Hardware Design Flow
View details for Web of Science ID 000628528400063
- Programming Heterogeneous Systems from an Image Processing DSL ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION 2017; 14 (3)