All Publications


  • Illusion of large on-chip memory by networked computing chips for neural network inference NATURE ELECTRONICS Radway, R. M., Bartolo, A., Jolly, P. C., Khan, Z. F., Le, B. Q., Tandon, P., Wu, T. F., Xin, Y., Vianello, E., Vivet, P., Nowak, E., Wong, H., Aly, M., Beigne, E., Wootters, M., Mitra, S. 2021
  • CAMBI: Contrast-aware Multiscale Banding Index Tandon, P., Afonso, M., Sole, J., Krasula, L., IEEE IEEE. 2021: 36-40
  • A Data-Compressive Wired-OR Readout for Massively Parallel Neural Recording Muratore, D., Tandon, P., Wootters, M., Chichilnisky, E. J., Mitra, S., Murmann, B. IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC. 2019: 1128–40

    Abstract

    Neural interfaces of the future will be used to help restore lost sensory, motor, and other capabilities. However, realizing this futuristic promise requires a major leap forward in how electronic devices interface with the nervous system. Next generation neural interfaces must support parallel recording from tens of thousands of electrodes within the form factor and power budget of a fully implanted device, posing a number of significant engineering challenges. In this paper, we exploit sparsity and diversity of neural signals to achieve simultaneous data compression and channel multiplexing for neural recordings. The architecture uses wired-OR interactions within an array of single-slope A/D converters to obtain massively parallel digitization of neural action potentials. The achieved compression is lossy but effective at retaining the critical samples belonging to action potentials, enabling efficient spike sorting and cell type identification. Simulation results of the architecture using data obtained from primate retina ex-vivo with a 512-channel electrode array show average compression rates up to  ∼ 40× while missing less than 5% of cells. In principle, the techniques presented here could be used to design interfaces to other parts of the nervous system.

    View details for DOI 10.1109/TBCAS.2019.2935468

    View details for Web of Science ID 000507321400002

    View details for PubMedID 31425051

  • Optimization of Electrical Stimulation for a High-Fidelity Artificial Retina Shah, N. P., Madugula, S., Grosberg, L., Mena, G., Tandon, P., Hottowy, P., Sher, A., Litke, A., Mitra, S., Chichilnisky, E. J., IEEE IEEE. 2019: 714–18
  • A 43pJ/Cycle Non-Volatile Microcontroller with 4.7 mu s Shutdown/Wake-up Integrating 2.3-bit/Cell Resistive RAM and Resilience Techniques Wu, T. F., Le, B. Q., Radway, R., Bartolo, A., Hwang, W., Jeong, S., Li, H., Tandon, P., Vianello, E., Vivet, P., Nowak, E., Wootters, M. K., Wong, H., Aly, M., Beigne, E., Mitra, S., Fujino, L. C., Anderson, J. H., Belostotski, L., Dunwell, D., Gaudet, Gulak, G., Haslett, J. W., Halupka, D., Smith, K. C. IEEE. 2019: 226-+
  • A Data-Compressive Wired-OR Readout for Massively Parallel Neural Recording Muratore, D. G., Tandon, P., Wootters, M., Chichilnisky, E. J., Mitra, S., Murmann, B., IEEE IEEE. 2019