Serhat Arslan

All Publications

• Bolt: Sub-RTT Congestion Control for Ultra-Low Latency 20th USENIX Symposium on Networked Systems Design and Implementation (NSDI 23) Arslan, S., Li, Y., Kumar, G., Dukkipati, N. 2023: 17
• Bolt: Sub-RTT Congestion Control for Ultra-Low Latency Arslan, S., Li, Y., Kumar, G., Dukkipati, N., USENIX Association USENIX ASSOC. 2023: 219-236

  View details for Web of Science ID 001066630000013

• SFC: Near-Source Congestion Signaling and Flow Control Le, Y., Lee, J., Blendin, J., Chen, J., Nikolaidis, G., Pan, R., Soule, R., Akella, A., Segura, P. Y., Singhvi, A., Li, Y., Meng, Q., Kim, C., Arslan, S. Arxiv. 2023 18

  Abstract

  State-of-the-art congestion control algorithms for data centers alone do not cope well with transient congestion and high traffic bursts. To help with these, we revisit the concept of direct \emph{backward} feedback from switches and propose Back-to-Sender (BTS) signaling to many concurrent incast senders. Combining it with our novel approach to in-network caching, we achieve near-source sub-RTT congestion signaling. Source Flow Control (SFC) combines these two simple signaling mechanisms to instantly pause traffic sources, hence avoiding the head-of-line blocking problem of conventional hop-by-hop flow control. Our prototype system and scale simulations demonstrate that near-source signaling can significantly reduce the message completion time of various workloads in the presence of incast, complementing existing congestion control algorithms. Our results show that SFC can reduce the 99th-percentile flow completion times by 1.2−6× and the peak switch buffer usage by 2−3× compared to the recent incast solutions.

• Trust-free service measurement and payments for decentralized cellular networks HotNets '22 Anand, S., Arslan, S., Chopra, R., Katti, S., Vaddiraju, M. K., Rana, R., Sheng, P., Tyagi, H., Viswanath, P. 2022: 8

  View details for DOI 10.1145/3563766.3564093

• Enabling the Reflex Plane with the nanoPU Ibanez, S., Mallery, A., Arslan, S., Jepsen, T., Shahbaz, M., Kim, C., McKeown, N. Arxiv. 2022 14

  Abstract

  Many recent papers have demonstrated fast in-network computation using programmable switches, running many orders of magnitude faster than CPUs. The main limitation of writing software for switches is the constrained programming model and limited state. In this paper we explore whether a new type of CPU, called the nanoPU, offers a useful middle ground, with a familiar C/C++ programming model, and potentially many terabits/second of packet processing on a single chip, with an RPC response time less than 1 μs. To evaluate the nanoPU, we prototype and benchmark three common network services: packet classification, network telemetry report processing, and consensus protocols on the nanoPU. Each service is evaluated using cycle-accurate simulations on FPGAs in AWS. We found that packets are classified 2× faster and INT reports are processed more than an order of magnitude quickly than state-of-the-art approaches. Our production quality Raft consensus protocol, running on the nanoPU, writes to a 3-way replicated key-value store (MICA) in 3 μs, twice as fast as the state-of-the-art, with 99\% tail latency of only 3.26 μs. To understand how these services can be combined, we study the design and performance of a {\em network reflex plane}, designed to process telemetry data, make fast control decisions, and update consistent, replicated state within a few microseconds.

• Updating the theory of buffer sizing PERFORMANCE EVALUATION Spang, B., Arslan, S., McKeown, N. 2021; 151

  View details for DOI 10.1016/j.peva.2021.102232

  View details for Web of Science ID 000712433500008

• NanoTransport: A Low-Latency, Programmable Transport Layer for NICs SOSR '21 Arslan, S., Ibanez, S., Mallery, A., Kim, C., McKeown, N. 2021: 14

  View details for DOI 10.1145/3482898.3483365

• The nanoPU: A Nanosecond Network Stack for Datacenters Ibanez, S., Mallery, A., Arslan, S., Jepsen, T., Shahbaz, M., Kim, C., McKeown, N., USENIX ASSOC USENIX ASSOC. 2021: 239-256

  View details for Web of Science ID 000696710000014

• Using Google Search Trends to Estimate Global Patterns in Learning L@S '20 Arslan, S., Tiwari, M., Piech, C. 2020: 11

  View details for DOI 10.1145/3386527.3405913

• Switches Know the Exact Amount of Congestion Arslan, S., McKeown, N., ACM ASSOC COMPUTING MACHINERY. 2019

  View details for DOI 10.1145/3375235.3375245

  View details for Web of Science ID 000850478600010