Bio


Sung-Jin received his B.S. and M.S. in Electrical Engineering from KAIST in 2008 and 2010 respectively, and he is currently a Ph.D. student in Electrical Engineering at Stanford University. Prior to starting the PhD program, he worked for Samsung Electonics from 2010 to 2016. He is interested in synthesizable analog circuits and automated design flow for high speed serial links(SerDes). He is currently working for the Open Source Phy project.

Honors & Awards


  • Bronze Price, Samsung Best Paper Award, Samsung Electronics (Oct. 2015)
  • Outstanding Employee, Samsung Electronics (Aug. 2015)
  • Best Lecturer, Samsung Electronics (Dec. 2013)
  • Best Patent, Samsung Electronics (Jan. 2011)
  • Samsung Graduate Scholarship, Samsung Electronics (Feb. 2008)
  • Winner, Undergraduate Research Program, KAIST (Feb. 2008)
  • William L. Everett Student Award of Excellence, International Engineering Consortium (Oct. 2006)
  • Bronze Prize, Wearable Computer Design Contest, Ministry of Knowledge and Economy of Korea (Oct. 2005)
  • National Science and Engineering Scholarship, Korea Student Aid Foundation (KFAS) (Mar. 2003)

Education & Certifications


  • M.S., KAIST, Electrical Engineering (2010)
  • B.S., KAIST, Electrical Engineering (2008)

Stanford Advisors


Patents


  • Sung-Jin Kim; Jihyun Kim. "South Korea Patent 101,749,583 Time difference adder, time difference accumulatior, sigma-delta time-to-digital converter, digital phase locked loop and temperature sensor", Samsung Electronics
  • Sung-Jin Kim; Taeik Kim; Se Hyun Jeon. "South Korea Patent 101,978,702 Pixel clock generator, operation method thereof, and apparatuses having the same", Samsung Electronics
  • Sung-Jin Kim; Jae-Jin Park. "Germany Patent 102,014,100,404 Temperature controlled oscillator and temperature sensor with the same", Samsung Electronics
  • Sung-Jin Kim; Jihyun Kim; Taeik Kim. "South Korea Patent 102,154,189 Time-to-Digital Converter using a Stochastic Phase Interpolation", Samsung Electronics
  • Sung-Jin Kim; Jihyun Kim. "China P.Rep. Patent 102,811,049 System-on-chip, time-to-digital converters, digital phase locked loops and temperature sensors", Samsung Electronics
  • Sung-Jin Kim; Jae-Jin Park. "China P.Rep. Patent 103,973,226 Temperature control oscillator, temperature sensor and on-chip system", Samsung Electronics
  • Sung-Jin Kim; Jihyun Kim; Taeik Kim. "China P.Rep. Patent 105,811,924 Clock generator with stability during PVT variations and on-chip oscillator having the same", Samsung Electronics
  • Sung-Jin Kim; Jae-Jin Park. "South Korea Patent 20140094095 Temperature controlled oscillator and temperature sensor including the same", Samsung Electronics
  • Sung-Jin Kim. "South Korea Patent 20150114839 Phase locked loop having dual bandwidth and method of operating the same", Samsung Electronics
  • Sung-Jin Kim; Jihyun Kim; Taeik Kim. "South Korea Patent 20160089750 A Stable Clock Generator For PVT and On Chip Oscillator Having The Same", Samsung Electronics
  • Sung-Jin Kim; Jihyun Kim; Taeik Kim. "Japan Patent 2016134916 Clock generator and on-chip oscillator including the same", Samsung Electronics
  • Sung-Jin Kim; Jihyun Kim; Taeik Kim. "Taiwan Patent 201627793 Clock generator with stability during PVT variations and on-chip oscillator having the same", Samsung Electronics
  • Sung-Jin Kim; Taeik Kim; Jihyun Kim. "South Korea Patent 20170025904 Current reference circuit and electronic device including the current reference circuit", Samsung Electronics
  • Sung-Jin Kim; Jihyun Kim. "Japan Patent 5,912,856 System on chip including time difference adder, system on chip including time difference accumulator, sigma-delta time digital converter, digital phase lock loop, temperature sensor, and system on chip", Samsung Electronics
  • Sung-Jin Kim; Jihyun Kim. "United States Patent 8,674,244 Time difference adders, time difference accumulators, sigma-delta time-to-digital converters, digital phase locked loops and temperature sensors", Samsung Electronics
  • Sung-Jin Kim; Jae-Jin Park. "United States Patent 9,191,015 Temperature controlled oscillator and temperature sensor including the same", Samsung Electronics
  • Sung-Jin Kim; Taeik Kim; Se Hyun Jeon. "United States Patent 9,203,344 Pixel clock generator, method of operating the same, and apparatuses including the pixel clock generator", Samsung Electronics
  • Sung-Jin Kim;. "United States Patent 9,438,102 Phase locked loop having dual bandwidth and method of operating the same", Samsung Electronics
  • Sung-Jin Kim; Jihyun Kim. "United States Patent 9,450,594 Time difference adders, time difference accumulators, sigma-delta time-to-digital converters, digital phase locked loops and temperature sensors", Samsung Electronics
  • Sung-Jin Kim; Jihyun Kim; Taeik Kim. "United States Patent 9,490,831 Time-to-digital converter using stochastic phase interpolation", Samsung Electronics
  • Sung-Jin Kim; Jihyun Kim; Taeik Kim. "United States Patent 9,584,132 Clock generator with stability during PVT variations and on-chip oscillator having the same", Samsung Electronics
  • Sung-Jin Kim; Taeik Kim; Jihyun Kim. "United States Patent 9,946,290 Current reference circuit and an electronic device including the same", Samsung Electronics
  • Sung-Jin Kim; Jihyun Kim. "Taiwan Patent I,594,581 Time difference adders, time difference accumulators, sigma-delta time-to-digital converters, digital phase locked loops and temperature sensors", Samsung Electronics

All Publications


  • Open-Source Synthesizable Analog Building Blocks for High-Speed Link Designs: 20-GS/s 5b ENOB Analog-to-Digital Converter and 5-GHz Phase Interpolator IEEE Symposium on VLSI Circuits Kim, S., Myers, Z., Herbst, S., Lim, B., Horowitz, M. 2020
  • 20-GS/s 8b Analog-to-Digital Converter and 5-GHz Phase Interpolator for Open-Source Synthesizable High-Speed Link Applications IEEE Solid-State Circuits Letters Kim, S., Myers, Z., Herbst, S., Lim, B., Horowitz, M. 2020
  • A 0.009mm2 2.06mW 32-to-2000MHz 2nd-order ΔΣ Analogous Bang-Bang Digital PLL with Feed-Forward Delay Locked and Phase-Locked Operations in 14nm FinFET Technology IEEE International Solid-State Circuits Conference Song, M., Kim, T., Kim, J., Kim, S., Park, H. 2015
  • A 0.6V 1.17ps PVT-Tolerant and Synthesizable Time-to-Digital Converter Using Stochastic Phase Interpolation with 16× Spatial Redundancy in 14nm FinFET Technology IEEE International Solid-State Circuits Conference Kim, S., Kim, W., Song, M., Kim, J., Kim, T., Park, H. 2015
  • A 0.63ps, 12b, Synchronous Cyclic TDC Using a Time Adder for On-chip Jitter Measurement of a SoC in 28nm CMOS IEEE Symposium on VLSI Circuits Kim, S., Kim, T., Park, H. 2014
  • A 0.010mm2 9.92psrms Low Tracking Jitter Pixel Clock Generator with a Divider Initializer and a Nearest Phase Selector in 28nm CMOS Technology IEEE Custom Integrated Circuits Conference Choo, K., Kim, S., Kim, W., Kim, J., Kim, T., Park, H. 2014
  • A 0.004mm² 250μW ΔΣ TDC With Time-Difference Accumulator and a 0.012mm² 2.5mW Bang-Bang Digital PLL Using PRNG for Low-Power SoC Applications IEEE International Solid-State Circuits Conference Hong, J., Kim, S., Liu, J., Xing, N., Jang, T., Park, J., Kim, J., Kim, T., Park, H. 2012
  • An Ultra-Low Power and Variation Tolerant GEN2 RFID Tag Front-End with Novel Clock-Free Decoder IEICE Transactions on Electronics Kim, S., Cho, M., Cho, S. 2010
  • A Variation Tolerant Reconfigurable Time Difference Amplier IEEE International SoC Conference Kim, S., Cho, S. 2009
  • An Ultra Low Power UHF RFID Tag Front-end for EPCglobal Gen2 with Novel Clock-free Decoder IEEE International Symposium on Circuit and System Kim, S., Cho, M., Park, J., Song, K., Kim, Y., Cho, S. 2008