School of Engineering
Showing 91-100 of 788 Results
-
Hugo Chen
Ph.D. Student in Electrical Engineering, admitted Autumn 2022
BioHugo "Jiun-Yu" Chen is currently pursuing his Ph.D. degree in the Department of Electrical Engineering at Stanford University. He earned his M.S. in Photonics and Optoelectronics from National Taiwan University in 2019 and his B.S. in Materials Science and Engineering from National Dong Hwa University in 2017.
Prior to joining Stanford, Hugo worked as an R&D engineer at Taiwan Semiconductor Manufacturing Company (TSMC) in the High Power Program and Analog Power/RF Specialty Technology from 2019 to 2022. His research experience includes investigating GaN high electron mobility transistors (HEMTs) for high power converter applications, oxide-based thin-film transistors (TFTs) for CMOS inverter applications, and III-V quantum dots molecular beam epitaxy (MBE) material growth.
As the first author, Hugo has published two peer-reviewed journal articles, six conference papers, and one US/KR/TW/CN/DE patent. He is currently advised by Professors H.-S. Philip Wong and Kwabena Boahen, and his research focuses on developing ferroelectric field-effect transistors (FeFETs) for dendritic-centric learning.
In his leisure time, Hugo enjoys biking, playing badminton, and watching dramas. -
Po-Han Chen
Ph.D. Student in Electrical Engineering, admitted Winter 2021
BioPo-Han Chen is an EE Ph.D. student at Stanford University supervised by Prof. Priyanka Raina. He received his B.S. in Electrical Engineering and Computer Science (EECS) and M.S. in Electrical Engineering from National Tsing Hua University (Taiwan) in 2016 and 2018 respectively. Before joining Stanford, he was a digital circuit designer at MediaTek where he worked on developing hardware architectures of image processing pipeline. He is interested in designing hardware accelerators. Most of his previous works were related to computational photography algorithms such as digital refocusing. Currently, He is focusing on analyzing and designing architecture of CGRAs to create high-performance, energy-efficient, and reconfigurable computing platforms.
