I am a PhD candidate in Electrical Engineering working at Professor Jelena Vuckovic's Nanoscale Quantum Photonics Laboratory. My research interests are computational optimizations of photonic devices and quantum technologies made from nanoscale fabrications.
Honors & Awards
Stanford Graduate Fellowship - STMicroelectronics Fellow, Stanford University (2018)
Kwanjeong Educational Foundation Overseas Scholarship, Kwanjeong Educational Foundation (2018)
Timothy B. Campbell Innovation Award in Electrical Engineering and Computer Sciences, University of California, Berkeley (2018)
Haas Scholars Fellowship, University of California, Berkeley (2017)
James H. Eaton Memorial Scholarship in Electrical Engineering and Computer Sciences, University of California, Berkeley (2017)
Education & Certifications
Bachelor of Science, University of California, Berkeley, Electrical Engineering and Computer Sciences (2018)
- Photonic Inverse Design of On-Chip Microresonators ACS PHOTONICS 2022; 9 (6): 1875-1881
- Inverse Spectral Design of Kerr Microcomb Pulses SPIE-INT SOC OPTICAL ENGINEERING. 2021
- Inverse-designed non-reciprocal pulse router for chip-based LiDAR NATURE PHOTONICS 2020
- Inverse-Designed Photonics for Semiconductor Foundries ACS PHOTONICS 2020; 7 (3): 569–75
4H-silicon-carbide-on-insulator for integrated quantum and nonlinear photonics
2020; 14: 330-334
View details for DOI 10.1038/s41566-019-0556-6
Toward inverse-designed optical interconnect
View details for Web of Science ID 000612237500103
Inverse design of microresonator dispersion for nonlinear optics
View details for Web of Science ID 000612090001279
Synthetic WSe2 monolayers with high photoluminescence quantum yield.
2019; 5 (1): eaau4728
In recent years, there have been tremendous advancements in the growth of monolayer transition metal dichalcogenides (TMDCs) by chemical vapor deposition (CVD). However, obtaining high photoluminescence quantum yield (PL QY), which is the key figure of merit for optoelectronics, is still challenging in the grown monolayers. Specifically, the as-grown monolayers often exhibit lower PL QY than their mechanically exfoliated counterparts. In this work, we demonstrate synthetic tungsten diselenide (WSe2) monolayers with PL QY exceeding that of exfoliated crystals by over an order of magnitude. PL QY of ~60% is obtained in monolayer films grown by CVD, which is the highest reported value to date for WSe2 prepared by any technique. The high optoelectronic quality is enabled by the combination of optimizing growth conditions via tuning the halide promoter ratio, and introducing a simple substrate decoupling method via solvent evaporation, which also mechanically relaxes the grown films. The achievement of scalable WSe2 with high PL QY could potentially enable the emergence of technologically relevant devices at the atomically thin limit.
View details for DOI 10.1126/sciadv.aau4728
View details for PubMedID 30613771
View details for PubMedCentralID PMC6314873
Inverse designed Fano resonance in Silicon microresonators
View details for Web of Science ID 000482226303042
Large-area and bright pulsed electroluminescence in monolayer semiconductors
2018; 9: 1229
Transition-metal dichalcogenide monolayers have naturally terminated surfaces and can exhibit a near-unity photoluminescence quantum yield in the presence of suitable defect passivation. To date, steady-state monolayer light-emitting devices suffer from Schottky contacts or require complex heterostructures. We demonstrate a transient-mode electroluminescent device based on transition-metal dichalcogenide monolayers (MoS2, WS2, MoSe2, and WSe2) to overcome these problems. Electroluminescence from this dopant-free two-terminal device is obtained by applying an AC voltage between the gate and the semiconductor. Notably, the electroluminescence intensity is weakly dependent on the Schottky barrier height or polarity of the contact. We fabricate a monolayer seven-segment display and achieve the first transparent and bright millimeter-scale light-emitting monolayer semiconductor device.
View details for DOI 10.1038/s41467-018-03218-8
View details for Web of Science ID 000428237700008
View details for PubMedID 29581419
View details for PubMedCentralID PMC5955902
- Polarization-resolved black phosphorus/molybdenum disulfide mid-wave infrared photodiodes with high detectivity at room temperature NATURE PHOTONICS 2018; 12 (601–607)
Strain-engineered growth of two-dimensional materials
2017; 8: 608
The application of strain to semiconductors allows for controlled modification of their band structure. This principle is employed for the manufacturing of devices ranging from high-performance transistors to solid-state lasers. Traditionally, strain is typically achieved via growth on lattice-mismatched substrates. For two-dimensional (2D) semiconductors, this is not feasible as they typically do not interact epitaxially with the substrate. Here, we demonstrate controlled strain engineering of 2D semiconductors during synthesis by utilizing the thermal coefficient of expansion mismatch between the substrate and semiconductor. Using WSe2 as a model system, we demonstrate stable built-in strains ranging from 1% tensile to 0.2% compressive on substrates with different thermal coefficient of expansion. Consequently, we observe a dramatic modulation of the band structure, manifested by a strain-driven indirect-to-direct bandgap transition and brightening of the dark exciton in bilayer and monolayer WSe2, respectively. The growth method developed here should enable flexibility in design of more sophisticated devices based on 2D materials.Strain engineering is an essential tool for modifying local electronic properties in silicon-based electronics. Here, Ahn et al. demonstrate control of biaxial strain in two-dimensional materials based on the growth substrate, enabling more complex low-dimensional electronics.
View details for DOI 10.1038/s41467-017-00516-5
View details for Web of Science ID 000411315800001
View details for PubMedID 28931806
View details for PubMedCentralID PMC5606995
MoS2 transistors with 1-nanometer gate lengths
2016; 354 (6308): 99-102
Scaling of silicon (Si) transistors is predicted to fail below 5-nanometer (nm) gate lengths because of severe short channel effects. As an alternative to Si, certain layered semiconductors are attractive for their atomically uniform thickness down to a monolayer, lower dielectric constants, larger band gaps, and heavier carrier effective mass. Here, we demonstrate molybdenum disulfide (MoS2) transistors with a 1-nm physical gate length using a single-walled carbon nanotube as the gate electrode. These ultrashort devices exhibit excellent switching characteristics with near ideal subthreshold swing of ~65 millivolts per decade and an On/Off current ratio of ~10(6) Simulations show an effective channel length of ~3.9 nm in the Off state and ~1 nm in the On state.
View details for DOI 10.1126/science.aah4698
View details for PubMedID 27846499