All Publications


  • Multi-<i>V<sub>T</sub></i> in Oxide--Semiconductor Transistors Leveraging Sub-1-nm Dipoles for Low-Refresh Energy Gain Cell Memory IEEE TRANSACTIONS ON ELECTRON DEVICES Athena, F., Kang, J., Passlack, M., Safron, N., Dede, D., Jana, K., Saini, B., Wang, X., Liu, S., Hartanto, J., Boneh, E., Chen, H., Huang, C., Lin, Q., Zhong, D., Leitherer, K., Mcintyre, P. C., Pitner, G., Radu, I. P., Wong, H. 2025