Academic Appointments


All Publications


  • SCALING REVERSE TIME MIGRATION PERFORMANCE THROUGH RECONFIGURABLE DATAFLOW ENGINES IEEE MICRO Fu, H., Gan, L., Clapp, R. G., Ruan, H., Pell, O., Mencer, O., Flynn, M., Huang, X., Yang, G. 2014; 34 (1): 30-40
  • Finite-Difference Wave Propagation Modeling on Special-Purpose Dataflow Machines IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS Pell, O., Bower, J., Dimond, R., Mencer, O., Flynn, M. J. 2013; 24 (5): 906-915
  • Moving from Petaflops to Petadata COMMUNICATIONS OF THE ACM Flynn, M. J., Mencer, O., Milutinovic, V., Rakocevic, G., Stenstrom, P., Trobec, R., Valero, M. 2013; 56 (5): 39-42
  • BEYOND TRADITIONAL MICROPROCESSORS FOR GEOSCIENCE HIGH-PERFORMANCE COMPUTING APPLICATIONS IEEE MICRO Lindtjorn, O., Clapp, R. G., Pell, O., Mencer, O., Flynn, M. J., Fu, H. 2011; 31 (2): 41-49
  • Finding Speedup in Parallel Processors 7th International Symposium on Parallel and Distributed Computing Flynn, M., Dimond, R., Mencer, O., Pell, O. IEEE COMPUTER SOC. 2008: 3–7
  • The future is parallel but it may not be easy 14th International Conference on High Performance Computing (HiPC 2007) Flynn, M. J. SPRINGER-VERLAG BERLIN. 2007: 1–1
  • Dynamic clock-frequencies for FPGAs MICROPROCESSORS AND MICROSYSTEMS Bower, J. A., Luk, W., Mencer, O., Flynn, M. J., Morf, M. 2006; 30 (6): 388-397
  • Microprocessor design issues: Thoughts on the road ahead IEEE MICRO Flynn, M. J., Hung, P. 2005; 25 (3): 16-31
  • Area-time-power and design effort: the basic tradeoffs in application specific systems 16th IEEE International Conference on Application-Specific Systems, Architecture and Processors Flynn, M. J. IEEE COMPUTER SOC. 2005: 3–6
  • Yesterday and tomorrow: A view on progress in computer design International Conference on Computer Design Flynn, M. J. IEEE COMPUTER SOC. 2005: 239–239
  • Systematic IEEE rounding method for high-speed floating-point multipliers IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS Quach, N. T., Takagi, N. F., Flynn, M. J. 2004; 12 (5): 511-521
  • Hot chips 15 - Scaling the silicon mountain IEEE MICRO Flynn, M., Dubey, P. 2004; 24 (2): 7-9
  • Computer architecture and technology - Some thoughts on the road ahead International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA 04) Flynn, M. J., Hung, P. C S R E A PRESS. 2004: 3–13
  • Rounding in redundant digit floating point systems Conference on Advanced Signal Processing Algorithms Architectures and Implementations XIII Fahmy, H. A., Flynn, M. J. SPIE-INT SOC OPTICAL ENGINEERING. 2003: 473–481
  • The case for a redundant format in floating point arithmetic 16th IEEE Symposium on Computer Arithmetic Fahmy, H. A., Flynn, M. J. IEEE COMPUTER SOC. 2003: 95–102
  • Programmed solutions: the step beyond programmed logic IEEE International Conference on Field-Programmable Technology (FPT) Flynn, M. J. IEEE. 2002: 13–16
  • Parametric time delay modeling for floating point units Conference on Advanced Signal Processing Algorithms, Architectures and Implementations XII Fahmy, H. A., Liddicoat, A. A., Flynn, M. J. SPIE-INT SOC OPTICAL ENGINEERING. 2002: 448–455
  • Object-oriented domain specific compilers for programming FPGAs IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS Mencer, O., Platzner, M., Morf, M., Flynn, M. J. 2001; 9 (1): 205-210
  • Improving the effectiveness of floating point arithmetic 35th Asilomar Conference on Signals, Systems and Computers Fahmy, H. A., Liddicoat, A. A., Flynn, M. J. IEEE. 2001: 875–879
  • Estimating interconnect wirelength for soft IP 14th Annual IEEE International ASIC/SOC Conference Hung, P., Semeria, L., Flynn, M. J. IEEE. 2001: 161–166
  • High-performance floating point divide Euromicro Symposium on Digital Systems Design (DSD 2001) Liddicoat, A. A., Flynn, M. J. IEEE COMPUTER SOC. 2001: 354–361
  • Hardware and software cache prefetching techniques for MPEG benchmarks IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY Zucker, D. F., Lee, R. B., Flynn, M. J. 2000; 10 (5): 782-796
  • Using simple tools to evaluate complex architectural trade-offs IEEE MICRO Flynn, M. J., Hung, P., Peymandoust, A. 2000; 20 (4): 67-75
  • High-speed interconnect schemes for a pipelined FPGA IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES Lee, H. J., Flynn, M. J. 2000; 147 (3): 195-202
  • Exploiting parallelism and data locality of systolic array applications using multi-ported FPGA International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA 2000) LEE, H., Lidicoat, A., Flynn, M. J. C S R E A PRESS. 2000: 229–235
  • StReAm: Object-oriented programming of stream architectures using PAM-Blox IEEE Symposium on Field-Programmable Custom Computing Machines Mencer, O., Hubert, H., Morf, M., Flynn, M. J. IEEE COMPUTER SOC. 2000: 309–310
  • Reciprocal approximation theory with table compensation Conference on Advanced Signal Processing Algorithms, Architectures, and Implementations X Liddicoat, A. A., Flynn, M. J. SPIE-INT SOC OPTICAL ENGINEERING. 2000: 235–246
  • Deep-submicron microprocessor design issues 2nd Cool Chips Symposium Flynn, M. J., Hung, P., Rudd, K. W. IEEE COMPUTER SOC. 1999: 11–22
  • Basic issues in microprocessor architecture JOURNAL OF SYSTEMS ARCHITECTURE Flynn, M. J. 1999; 45 (12-13): 939-948
  • Producer-consumer communication in distributed shared memory multiprocessors PROCEEDINGS OF THE IEEE Byrd, G. T., Flynn, M. J. 1999; 87 (3): 456-466
  • Multiprocessor architecture using an audit trail for fault tolerance 29th Annual International Symposium on Fault-Tolerant Computing (FTCS-29) Sunada, D., Glasco, D., Flynn, M. IEEE COMPUTER SOC. 1999: 40–47
  • Precision of semi-exact redundant continued fraction arithmetic for VLSI Conference on Advanced Signal Processing Algorithms, Architectures, and Implementations IX Mencer, O., Morf, M., Flynn, M. J. SPIE-INT SOC OPTICAL ENGINEERING. 1999: 350–358
  • Technology scaling effects on multipliers IEEE TRANSACTIONS ON COMPUTERS Al-Twaijry, H. A., Flynn, M. J. 1998; 47 (11): 1201-1215
  • Reducing the mean latency of floating-point addition EuroPar 96 Oberman, S. F., Flynn, M. J. ELSEVIER SCIENCE BV. 1998: 201–14
  • Computer engineering 30 years after the IBM Model 91 COMPUTER Flynn, M. J. 1998; 31 (4): 27-?
  • Minimizing the complexity of SRT tables IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS Oberman, S. F., Flynn, M. J. 1998; 6 (1): 141-149
  • Smart photonic networks and computer security for image data Conference on Multimedia Networks - Security, Displays, Terminals, and Gateways Campello, J., GILL, J. T., Morf, M., Flynn, M. J. SPIE - INT SOC OPTICAL ENGINEERING. 1998: 272–279
  • An automated method for software controlled cache prefetching 31st Hawaii International Conference on System Sciences (HICSS-31) Zucker, D. F., Lee, R. B., Flynn, M. J. I E E E, COMPUTER SOC PRESS. 1998: 106–114
  • Effectiveness of producer-initiated communication 31st Hawaii International Conference on System Sciences (HICSS-31) Byrd, G. T., Flynn, M. J. I E E E, COMPUTER SOC PRESS. 1998: 770–771
  • PAM-Blox: High performance FPGA design for adaptive computing IEEE Symposium on FPGAs for Custom Computing Machines Mencer, O., Morf, M., Flynn, M. J. IEEE COMPUTER SOC. 1998: 167–174
  • Evaluation of communication mechanisms in invalidate-based shared memory multiprocessors 2nd International Workshop on Parallel Computer Routing and Communication (PCRCW 97) Byrd, G. T., Flynn, M. J. SPRINGER-VERLAG BERLIN. 1998: 159–170
  • Implementation and optimization issues for the H.263 compression standard 32nd Asilomar Conference on Signals, Systems and Computers Yu, A., Flynn, M. IEEE. 1998: 447–451
  • Hardware software tri-design of Encryption for mobile communication units IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP 98) Mencer, O., Morf, M., Flynn, M. J. IEEE. 1998: 3045–3048
  • Division algorithms and implementations IEEE TRANSACTIONS ON COMPUTERS Oberman, S. F., Flynn, M. J. 1997; 46 (8): 833-854
  • Introduction to ''influence of programming techniques on the design of computers'' PROCEEDINGS OF THE IEEE Flynn, M. J. 1997; 85 (3): 467-469
  • Design issues in division and other floating-point operations IEEE TRANSACTIONS ON COMPUTERS Oberman, S. F., Flynn, M. J. 1997; 46 (2): 154-161
  • The SNAP project: Design of floating point arithmetic units 13th IEEE Symposium on Computer Arithmetic Oberman, S. F., AlTwaijry, H., Flynn, M. J. IEEE COMPUTER SOC. 1997: 156–165
  • Prediction caches for superscalar processors 30th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-30) BENNETT, J. E., Flynn, M. J. I E E E, COMPUTER SOC PRESS. 1997: 81–90
  • Performance enhancement of H.263 encoder based on zero coefficient prediction 5th ACM International Multimedia Conference Yu, A., LEE, R., Flynn, M. ADDISON-WESLEY PUBL CO. 1997: 21–29
  • Instruction-level parallel processors - Dynamic and static scheduling tradeoffs 2nd AIZU International Symposium on Parallel Algorithms/Architecture Synthesis Rudd, K. W., Flynn, M. J. IEEE COMPUTER SOC. 1997: 74–81
  • An evaluation of video fidelity metrics 42nd IEEE-Computer-Society International Conference (CompCon 97) Yu, A., LEE, R., Flynn, M. I E E E, COMPUTER SOC PRESS. 1997: 49–55
  • What's ahead in computer design? 23rd Euromicro Conference on New Frontiers of Information Technology (Euromicro 97) Flynn, M. J. IEEE COMPUTER SOC. 1997: 4–9
  • Achieving subword parallelism by software reuse of the floating point data path Conference on Multimedia Hardware Architectures 1997 Zucker, D. F., Lee, R. B., Flynn, M. J. SPIE - INT SOC OPTICAL ENGINEERING. 1997: 51–64
  • Hardware starting approximation method and its application to the square root operation IEEE TRANSACTIONS ON COMPUTERS Schwarz, E. M., Flynn, M. J. 1996; 45 (12): 1356-1369
  • Parallel architectures ACM COMPUTING SURVEYS Flynn, M. J., Rudd, K. W. 1996; 28 (1): 67-70
  • Improving performance for software MPEG players 41st IEEE-Computer-Society International Conference on Technologies for the Information Superhighway (COMPCON 96) Zucker, D. F., Flynn, M. J., Lee, R. B. I E E E, COMPUTER SOC PRESS. 1996: 327–332
  • Optimal on-chip cache hierarchy synthesis with scaling of technology IEEE 15th Annual International Phoenix Conference on Computers and Communications Fu, S. T., Flynn, M. J. IEEE. 1996: 129–135
  • Memory hierarchy synthesis of a multimedia embedded processor 1996 IEEE International Conference on Computer Design - VLSI in Computers and Processors (ICCD 96) Fu, S. T., Zucker, D. F., Flynn, M. J. IEEE COMPUTER SOC. 1996: 176–184
  • Implementing division and other floating-point operations: A system perspective International Symposium on Scientific Computing, Computer Arithmetic and Validated Numerics SCAN-95 Oberman, S. F., Flynn, M. J. AKADEMIE VERLAG GMBH. 1996: 18–24
  • A comparison of hardware prefetching techniques for multimedia benchmarks International Conference on Multimedia Computing and Systems Zucker, D. F., Flynn, M. J., Lee, R. B. IEEE COMPUTER SOC. 1996: 236–244
  • System design using wave-pipelining: A CMOS VLSI vector unit 1995 IEEE International Symposium on Circuits and Systems (ISCAS-1995) Nowka, K. J., Flynn, M. J. IEEE. 1995: 2301–2304
  • EVALUATING PERFORMANCE TRADEOFFS BETWEEN FINE-GRAINED AND COARSE-GRAINED ALTERNATIVES IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS Dubey, P. K., Adams, G. B., Flynn, M. J. 1995; 6 (1): 17-27
  • The SNAP project: Towards sub-nanosecond arithmetic 12th Symposium on Computer Arithmetic Flynn, M. J., Nowka, K., BEWICK, G., Schwarz, E., Quach, N. I E E E, COMPUTER SOC PRESS. 1995: 75–82
  • A BUBBLE PROPAGATION MODEL FOR PIPELINE PERFORMANCE JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING Dubey, P. K., Flynn, M. J. 1994; 23 (3): 330-337
  • FAST MULTIPLICATION IN VLSI USING WAVE PIPELINING TECHNIQUES JOURNAL OF VLSI SIGNAL PROCESSING Klass, F., Flynn, M. J., VANDEGOOR, A. D. 1994; 7 (3): 233-248
  • INSTRUCTION WINDOW SIZE TRADE-OFFS AND CHARACTERIZATION OF PROGRAM PARALLELISM IEEE TRANSACTIONS ON COMPUTERS Dubey, P. K., Adams, G. B., Flynn, M. J. 1994; 43 (4): 431-442
  • SPARSE ADAPTIVE MEMORY & HANDWRITTEN DIGIT RECOGNITION 1994 IEEE International Conference on Neural Networks (ICNN 94) - 1st IEEE World Congress on Computational Intelligence Flachs, B., Flynn, M. IEEE. 1994: 1098–1102
  • A 16X16-BIT STATIC CMOS WAVE-PIPELINED MULTIPLIER 1994 IEEE International Symposium on Circuits and Systems Klass, F., Flynn, M. J., VANDEGOOR, A. J. I E E E. 1994: D143–D146
  • THE IMPACT OF CACHE COHERENCE PROTOCOLS ON SYSTEMS USING FINE-GRAIN DATA SYNCHRONIZATION IFIP WG10.3 Working Conference on Parallel Architectures and Compilation Techniques (PACT 94) GLASCO, D. B., DELAGI, B. A., Flynn, M. J. ELSEVIER SCIENCE PUBL B V. 1994: 79–88
  • PARALLEL HIGH-RADIX NONRESTORING DIVISION IEEE TRANSACTIONS ON COMPUTERS Schwarz, E. M., Flynn, M. J. 1993; 42 (10): 1234-1246
  • DESIGNING HIGH-PERFORMANCE DIGITAL CIRCUITS USING WAVE PIPELINING - ALGORITHMS AND PRACTICAL EXPERIENCES IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS Wong, D. C., Demicheli, G., Flynn, M. J. 1993; 12 (1): 25-46
  • HARDWARE STARTING APPROXIMATION FOR THE SQUARE-ROOT OPERATION 11TH SYMP ON COMPUTER ARITHMETIC Schwarz, E. M., Flynn, M. J. I E E E, COMPUTER SOC PRESS. 1993: 103–111
  • SPARSE ADAPTIVE MEMORY World Congress on Neural Networks (WCNN 93, Portland) Flachs, B., Flynn, M. LAWRENCE ERLBAUM ASSOC PUBL. 1993: 280–283
  • PROCESSOR ARCHITECTURE AND DATA BUFFERING IEEE TRANSACTIONS ON COMPUTERS Mulder, H., Flynn, M. J. 1992; 41 (10): 1211-1222
  • FAST DIVISION USING ACCURATE QUOTIENT APPROXIMATIONS TO REDUCE THE NUMBER OF ITERATIONS IEEE TRANSACTIONS ON COMPUTERS Wong, D., Flynn, M. 1992; 41 (8): 981-994
  • A BIPOLAR POPULATION COUNTER USING WAVE PIPELINING TO ACHIEVE 2.5 X NORMAL CLOCK FREQUENCY IEEE JOURNAL OF SOLID-STATE CIRCUITS Wong, D. C., Demicheli, G., Flynn, M. J., HUSTON, R. E. 1992; 27 (5): 745-753
  • SCALABLE CACHE COHERENCE FOR SHARED-MEMORY MULTIPROCESSORS 1ST INTERNATIONAL CONF ON PARALLEL COMPUTATION Thapar, M., DELAGI, B. A., Flynn, M. J. SPRINGER VERLAG. 1992: 1–12
  • APPROXIMATING THE SINE FUNCTION WITH COMBINATIONAL LOGIC 26TH ASILOMAR CONF ON SIGNALS, SYSTEMS AND COMPUTERS Schwarz, E. M., Flynn, M. J. I E E E, COMPUTER SOC PRESS. 1992: 386–390
  • DESIGN OF COMPACT HIGH-PERFORMANCE PROCESSING ELEMENTS FOR THE FCHC LATTICE GAS MODELS 5TH CONF ON PARALLEL PROCESSING FOR SCIENTIFIC COMPUTING Lee, F. F., Flynn, M. J., Morf, M. SIAM. 1992: 616–622
  • AN AREA MODEL FOR ON-CHIP MEMORIES AND ITS APPLICATION IEEE JOURNAL OF SOLID-STATE CIRCUITS MULDER, J. M., Quach, N. T., Flynn, M. J. 1991; 26 (2): 98-106
  • FAST DIVISION USING ACCURATE QUOTIENT APPROXIMATIONS TO REDUCE THE NUMBER OF ITERATIONS 10TH IEEE SYMP ON COMPUTER ARITHMETIC Wong, D. C., Flynn, M. J. I E E E, COMPUTER SOC PRESS. 1991: 191–201
  • THE EFFECTS OF PROCESSOR ARCHITECTURE ON INSTRUCTION MEMORY TRAFFIC ACM TRANSACTIONS ON COMPUTER SYSTEMS Mitchell, C. L., Flynn, M. J. 1990; 8 (3): 230-250
  • OPTIMAL PIPELINING JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING Dubey, P. K., Flynn, M. J. 1990; 8 (1): 10-19
  • INSERTING ACTIVE DELAY ELEMENTS TO ACHIEVE WAVE PIPELINING 1989 IEEE INTERNATIONAL CONF ON COMPUTER-AIDED DESIGN : A CONF FOR THE EE CAD PROFESSIONAL ( ICCAD-89 ) Wong, D., Demicheli, G., Flynn, M. I E E E, COMPUTER SOC PRESS. 1989: 270–273
  • PERFORMANCE TRADE-OFFS FOR MICROPROCESSOR CACHE MEMORIES IEEE MICRO ALPERT, D. B., Flynn, M. J. 1988; 8 (4): 44-55
  • A WORKBENCH FOR COMPUTER ARCHITECTS IEEE DESIGN & TEST OF COMPUTERS Mitchell, C. L., Flynn, M. J. 1988; 5 (1): 19-29
  • AND NOW A CASE FOR MORE COMPLEX INSTRUCTION SETS COMPUTER Flynn, M. J., Mitchell, C. L., MULDER, J. M. 1987; 20 (9): 71-83
  • REDUCING EXECUTION PARAMETERS THROUGH CORRESPONDENCE IN COMPUTER ARCHITECTURE IBM JOURNAL OF RESEARCH AND DEVELOPMENT WAKEFIELD, S. P., Flynn, M. J. 1987; 31 (4): 420-434
  • ON INSTRUCTION SETS AND THEIR FORMATS IEEE TRANSACTIONS ON COMPUTERS Flynn, M. J., Johnson, J. D., WAKEFIELD, S. P. 1985; 34 (3): 242-254
  • MEASURES OF IDEAL EXECUTION ARCHITECTURES IBM JOURNAL OF RESEARCH AND DEVELOPMENT Flynn, M. J., HOEVEL, L. W. 1984; 28 (4): 356-369
  • EXECUTION ARCHITECTURE - THE DELTRAN EXPERIMENT IEEE TRANSACTIONS ON COMPUTERS Flynn, M. J., HOEVEL, L. W. 1983; 32 (2): 156-175
  • PARALLELISM AND REPRESENTATION PROBLEMS IN DISTRIBUTED SYSTEMS IEEE TRANSACTIONS ON COMPUTERS Flynn, M. J., HENNESSY, J. L. 1980; 29 (12): 1080-1086
  • DIRECTIONS AND ISSUES IN ARCHITECTURE AND LANGUAGE COMPUTER Flynn, M. J. 1980; 13 (10): 5-?
  • COURSE OF STUDY IN COMPUTER HARDWARE ARCHITECTURE COMPUTER ROSSMANN, G. E., Flynn, M. J., Fuller, S. H., Bell, C. G., Brooks, F. P., HELLERMAN, H. 1975; 8 (12): 44-63
  • MICROPROGRAMMING - ANOTHER LOOK AT INTERNAL COMPUTER CONTROL PROCEEDINGS OF THE IEEE Flynn, M. J. 1975; 63 (11): 1554-1567