Saranyu Chattopadhyay

All Publications

• G-QED: Generalized QED Pre-silicon Verification beyond Non-Interfering Hardware Accelerators Chattopadhyay, S., Devarajegowda, K., Zhao, B., Lonsing, F., D'Agostino, B. A., Vavelidou, I., Bhatt, V. D., Prebeck, S., Ecker, W., Trippel, C., Barrett, C., Mitra, S., IEEE IEEE. 2023

  View details for DOI 10.1109/DAC56929.2023.10247903

  View details for Web of Science ID 001073487300211

• LeGO: A Learning-Guided Obfuscation Framework for Hardware IP Protection IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS Alaql, A., Chattopadhyay, S., Chakraborty, P., Hoque, T., Bhunia, S. 2022; 41 (4): 854-867

  View details for DOI 10.1109/TCAD.2021.3075939

  View details for Web of Science ID 000770597100008

• <i>Proof</i>-<i>Stitch</i>: Proof Combination for Divide-and-Conquer SAT Solvers Nair, A., Chattopadhyay, S., Wu, H., Ozdemir, A., Barrett, C. edited by Griggio, A., Rungta, N. TU Wien Acad Press. 2022: 84-88

  View details for DOI 10.34727/2022/isbn.978-3-85448-053-2_14

  View details for Web of Science ID 001062691400014

• A Conditionally Chaotic Physically Unclonable Function Design Framework with High Reliability ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS Chattopadhyay, S., Santikellur, P., Chakraborty, R., Mathew, J., Ottavi, M. 2021; 26 (6)

  View details for DOI 10.1145/3460004

  View details for Web of Science ID 000756208000001

• A-QED Verification of Hardware Accelerators Singh, E., Lonsing, F., Chattopadhyay, S., Strange, M., Wei, P., Zhang, X., Zhou, Y., Chen, D., Cong, J., Raina, P., Zhang, Z., Barrett, C., Mitra, S., IEEE IEEE. 2020

  View details for Web of Science ID 000628528400220

• Cyclic Beneg Network based Logic Encryption for Mitigating SAT-Based Attacks Chattopadhyay, S., Chakraborty, R., IEEE IEEE. 2019: 567–75

  View details for DOI 10.1109/ICCD46524.2019.00083

  View details for Web of Science ID 000542037800072

• Machine Learning Assisted Accurate Estimation of Usage Duration and Manufacturer for Recycled and Counterfeit Flash Memory Detection Chattopadhyay, S., Kumari, P., Ray, B., Chakraborty, R., IEEE IEEE COMPUTER SOC. 2019: 49-54

  View details for DOI 10.1109/ATS47505.2019.000-1

  View details for Web of Science ID 000528614300009

• A novel technique for implementing reactance in spin domain using Spin Hall Effect MICROELECTRONICS JOURNAL Chattopadhyay, S. 2018; 79: 24-29

  View details for DOI 10.1016/j.mejo.2018.06.015

  View details for Web of Science ID 000443154300004

• STT-MRAM for Low Power Access for Read-Intensive Parallel Deep-Learning Architectures Chattopadhyay, S., Brahma, K., Ray, A., Sharad, M., IEEE IEEE. 2017: 61-65

  View details for DOI 10.1109/iNIS.2017.22

  View details for Web of Science ID 000428510500013