Thierry Tambe
Assistant Professor of Electrical Engineering and, by courtesy, of Computer Science
Bio
Thierry Tambe is an Assistant Professor of Electrical Engineering and, by courtesy, of Computer Science, and the William George and Ida Mary Hoover Faculty Fellow at Stanford University. His research makes AI and emerging data-intensive applications run efficiently on domain-specific hardware via algorithm-to-silicon co-design. His work has been recognized through a Google ML and Systems Junior Faculty Award, a NVIDIA Graduate PhD Fellowship, an IEEE SSCS Predoctoral Achievement Award, and several distinguished paper awards. Previously, Thierry was a visiting research scientist at NVIDIA and an engineer at Intel. He received a B.S. and M.Eng. from Texas A&M University, and a PhD from Harvard University, all in Electrical Engineering.
Academic Appointments
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Assistant Professor, Electrical Engineering
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Assistant Professor (By courtesy), Computer Science
Program Affiliations
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Stanford SystemX Alliance
Professional Education
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PhD, Harvard University, Electrical Engineering (2023)
2025-26 Courses
- Design Projects in VLSI Systems I
EE 272 (Win) - Differentiated Memory Systems
EE 392C (Spr) - Hardware Accelerators for Machine Learning
CS 217 (Win) - Introduction to VLSI Systems
EE 271 (Aut) -
Independent Studies (5)
- Independent Work
CS 199 (Spr, Sum) - Special Studies and Reports in Electrical Engineering
EE 191 (Aut, Win, Spr) - Special Studies and Reports in Electrical Engineering
EE 391 (Aut, Win, Spr, Sum) - Special Studies or Projects in Electrical Engineering
EE 390 (Win, Spr) - Supervised Undergraduate Research
CS 195 (Spr, Sum)
- Independent Work
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Prior Year Courses
2024-25 Courses
- Digital Systems Architecture
CS 180, EE 180 (Win) - Introduction to VLSI Systems
EE 271 (Aut)
- Digital Systems Architecture
Stanford Advisees
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Doctoral Dissertation Reader (AC)
Po-Han Chen, Yuchen Mei, Jeffrey Yu -
Master's Program Advisor
Jesse Fonseca, Zion Kang, Josh Kirshenbaum, Parth Shroff, Henok Tewolde -
Doctoral (Program)
Vishal Canumalla, Tun-Yu Chang, Peijing Li, Yasmine Omri
All Publications
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EPOCHS-1: A 12 nm Highly Heterogeneous Open-Source SoC With Distributed Coin-Based Power Management and Integrated Hybrid Voltage Regulation
IEEE JOURNAL OF SOLID-STATE CIRCUITS
2025
View details for DOI 10.1109/JSSC.2025.3602386
View details for Web of Science ID 001582352200001
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Towards Memory Specialization: A Case for Long-Term and Short-Term RAM
ASSOC COMPUTING MACHINERY. 2025: 27-36
View details for DOI 10.1145/3764862.3768175
View details for Web of Science ID 001657155600004
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Application-level Validation of Accelerator Designs Using a Formal Software/Hardware Interface
ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS
2024; 29 (2)
View details for DOI 10.1145/3639051
View details for Web of Science ID 001193665600012
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JointNF: Enhancing DNN Performance through Adaptive N:M Pruning across both Weight and Activation
ASSOC COMPUTING MACHINERY. 2024
View details for DOI 10.1145/3665314.3670813
View details for Web of Science ID 001324640900056
- A 12nm 18.1TFLOPs/W Sparse Transformer Processor with Entropy-Based Early Exit, Mixed-Precision Predication and Fine-Grained Power Management IEEE International Solid-State Circuits Conference (ISSCC) 2023
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A 16-nm SoC for Noise-Robust Speech and NLP Edge AI Inference With Bayesian Sound Source Separation and Attention-Based DNNs
IEEE JOURNAL OF SOLID-STATE CIRCUITS
2023; 58 (2): 569-581
View details for DOI 10.1109/JSSC.2022.3179303
View details for Web of Science ID 000846283600001
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GoldenEye: A Platform for Evaluating Emerging Numerical Data Formats in DNN Accelerators
IEEE. 2022: 206-214
View details for DOI 10.1109/DSN53405.2022.00031
View details for Web of Science ID 000853348200018
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ASAP: Automatic Synthesis of Area-Efficient and Precision-Aware CGRAs
ASSOC COMPUTING MACHINERY. 2022
View details for DOI 10.1145/3524059.3532359
View details for Web of Science ID 001086201800001
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EdgeBERT: Sentence-Level Energy Optimizations for Latency-Aware Multi-Task NLP Inference
ASSOC COMPUTING MACHINERY. 2021: 830-844
View details for DOI 10.1145/3466752.3480095
View details for Web of Science ID 001118047400060
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Robomorphic Computing: A Design Methodology for Domain-Specific Accelerators Parameterized by Robot Morphology
ASSOC COMPUTING MACHINERY. 2021: 674-686
View details for DOI 10.1145/3445814.3446746
View details for Web of Science ID 000829871000047
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A 25mm<SUP>2</SUP> SoC for IoT Devices with 18ms Noise-Robust Speech-to-Text Latency via Bayesian Speech Denoising and Attention-Based Sequence-to-Sequence DNN Speech Recognition in 16nm FinFET
edited by Fujino, L. C., Anderson, J. H., Belostotski, L., Dunwell, D., Gaudet, Gulak, Haslett, J. W., Halupka, D., Mirabbasi, S., Smith, K. C.
IEEE. 2021: 158-+
View details for DOI 10.1109/ISSCC42613.2021.9366062
View details for Web of Science ID 000662193600058
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Algorithm-Hardware Co-Design of Adaptive Floating-Point Encodings for Resilient Deep Learning Inference
IEEE. 2020
View details for DOI 10.1109/dac18072.2020.9218516
View details for Web of Science ID 000628528400028
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A 3mm<SUP>2</SUP> Programmable Bayesian Inference Accelerator for Unsupervised Machine Perception using Parallel Gibbs Sampling in 16nm
IEEE. 2020
View details for Web of Science ID 000621657500011
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MASR: A Modular Accelerator for Sparse RNNs
IEEE COMPUTER SOC. 2019: 1-14
View details for DOI 10.1109/PACT.2019.00009
View details for Web of Science ID 000550990200001
https://orcid.org/0000-0002-6411-9620