Bio


Saraswat is working on a variety of problems related to new and innovative materials, structures, and process technology of silicon, germanium and III-V devices and interconnects for VLSI and nanoelectronics. Areas of his current interest are: new device structures to continue scaling MOS transistors, DRAMs and flash memories to nanometer regime, 3-dimentional ICs with multiple layers of heterogeneous devices, metal and optical interconnections and high efficiency and low cost solar cells.

Academic Appointments


Honors & Awards


  • Inventor recognition award, Semiconductor Research Corporation (1987)
  • Thomas Callinan Award, the Electrochemical Society 1989 Fellow, IEEE (2000)
  • Rickey/Nielsen Professor School of Engineering, Stanford University (2004)
  • Andrew S. Grove Award, IEEE (2004)
  • Inventor Recognition Award, MARCO/FCR (2007)
  • Technovisionary Award, India Semiconductor Association (2007)
  • Alum of the Year Award, BIT (2012)
  • University Researcher of the Year Award, Semiconductor Industry Association (SIA) (2012)

Professional Education


  • PhD, Stanford University (1974)

Journal Articles


  • Study of Carrier Statistics in Uniaxially Strained Ge for a Low-Threshold Ge Laser IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS Nam, D., Sukhdeo, D. S., Gupta, S., Kang, J., Brongersma, M. L., Saraswat, K. C. 2014; 20 (4)
  • Strain Enhanced High Efficiency Germanium Photodetectors in the Near Infrared for Integration with Si Optics Letters Okyay, Ali, K., Nayfeh, A., M., Saraswat, K., C., Marshall, A., McIntyre, P., C., Yonehara, T.
  • Theoretical Analysis of GeSn Alloys as a Gain Medium for a Si-Compatible Laser IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS Dutt, B., Lin, H., Sukhdeo, D. S., Vulovic, B. M., Gupta, S., Nam, D., Saraswat, K. C., Harris, J. S. 2013; 19 (5)
  • Experimental and theoretical investigation of phosphorus in-situ doping of germanium epitaxial layers CURRENT APPLIED PHYSICS Yu, H., Battal, E., Okyay, A. K., Shim, J., Park, J., Baek, J. W., Saraswat, K. C. 2013; 13 (6): 1060-1063
  • Achieving direct band gap in germanium through integration of Sn alloying and external strain JOURNAL OF APPLIED PHYSICS Gupta, S., Magyari-Koepe, B., Nishi, Y., Saraswat, K. C. 2013; 113 (7)

    View details for DOI 10.1063/1.4792649

    View details for Web of Science ID 000315262800027

  • Material characterization of high Sn-content, compressively-strained GeSn epitaxial films after rapid thermal processing JOURNAL OF CRYSTAL GROWTH Chen, R., Huang, Y., Gupta, S., Lin, A. C., Sanchez, E., Kim, Y., Saraswat, K. C., Kamins, T. I., Harris, J. S. 2013; 365: 29-34
  • Effects of Thermal Annealing on In Situ Phosphorus-Doped Germanium n(+)/p Junction IEEE ELECTRON DEVICE LETTERS Shim, J., Song, I., Jung, W., Nam, J., Leem, J. W., Yu, J. S., Kim, D. E., Cho, W. J., Kim, Y. S., Jun, D., Heo, J., Park, W., Park, J., Saraswat, K. C. 2013; 34 (1): 15-17
  • Strain-Induced Pseudo-Heterostructure Nanowires Confining 2 Carriers at Room Temperature with Nanoscale-Tunable Band Profiles Nano Letters Nam, D., Sukhdeo, D., S., Kang, J., H., Petykiewicz, J., Lee, J., H., Jung, W., S., Saraswat, K. 2013

    View details for DOI 10.1021/nl401042n

  • Electrical Characterization of GaP-Silicon Interface for Memory and Transistor Applications IEEE Trans. Electron Dev. Pal, A., Nainani, A., Ye, Z., Bao, X., Sanchez, E., Saraswat, K., C. 2013; 60 (7): 2238 – 2245
  • GaP Source-Drain Vertical Transistor on Bulk Silicon for 1-Transistor DRAM Application IEEE International Memory Workshop Pal, A., Saraswat, K., C., Nainani, A., Ye, Z., Bao, X., Sanchez, E. 2013
  • A Group IV Solution for 7nm FinFET CMOS: Stress Engineering Using Si, Ge and Sn IEEE IEDM Gupta, S., Moroz, V., Smith, L., Lu, Q., Saraswat, K., C. 2013
  • Hole Mobility Enhancement in Compressively Strained Ge0.93Sn0.07 pMOSFETs IEEE Electron Dev. Lett. Gupta, S., Huang, Y. -C., Kim, Y., Sanchez, E., Saraswat, K., C. 2013; 34 (7): 831 – 833
  • Stanford Engineering & Research on Materials and Device International Workshop on Nanodevice Technologies 2013, Saraswat, Krishna, C. 2013
  • Effects of point defect healing on phosphorus implanted germanium n+/p junction and its thermal stability J. Appl. Phys. Shim, J., Shin, J., H., Lee, I., Y., Choi, D., Baek, J., W., Heo, J., Saraswat, K. 2013; 114: 94515
  • Highly selective dry etching of germanium over germanium-tin (GeSn) alloys: A novel route for GeSn nanostructure fabrication Nano Letters Gupta, S., Chen, R., Huang, Y. -C., Kim, Y., Sanchez, E., Harris, J., S., Saraswat, K. 2013

    View details for DOI 10.1021/nl4017286

  • Characterization of Geometric Leakage Current of GeO2 Isolation and Effect of Forming Gas Annealing in Germanium p-n Junctions IEEE ELECTRON DEVICE LETTERS Jung, W., Park, J., Lin, J. J., Wong, S., Saraswat, K. C. 2012; 33 (11): 1520-1522
  • Reduction in Specific Contact Resistivity to n(+) Ge Using TiO2 Interfacial Layer IEEE ELECTRON DEVICE LETTERS Lin, J. J., Roy, A. M., Saraswat, K. C. 2012; 33 (11): 1541-1543
  • Roadmap to an Efficient Germanium-on-Silicon Laser: Strain vs. n-Type Doping IEEE PHOTONICS JOURNAL Dutt, B. (., Sukhdeo, D. S., Nam, D., Vulovic, B. M., Yuan, Z., Saraswat, K. C. 2012; 4 (5): 2002-2009
  • Fluorine passivation of vacancy defects in bulk germanium for Ge metal-oxide-semiconductor field-effect transistor application APPLIED PHYSICS LETTERS Jung, W., Park, J., Nainani, A., Nam, D., Saraswat, K. C. 2012; 101 (7)

    View details for DOI 10.1063/1.4746389

    View details for Web of Science ID 000308263100032

  • Characteristics of metal-induced crystallization/dopant activation and its application to junction diodes on single-crystalline silicon JOURNAL OF PHYSICS D-APPLIED PHYSICS Jung, W., Park, J., Jung, H., Saraswat, K. C. 2012; 45 (24)
  • The Effect of Fixed Charge in Tunnel-Barrier Contacts for Fermi-Level Depinning in Germanium IEEE ELECTRON DEVICE LETTERS Roy, A. M., Lin, J., Saraswat, K. C. 2012; 33 (6): 761-763
  • Amelioration of interface state response using band engineering in III-V quantum well metal-oxide-semiconductor field-effect transistors APPLIED PHYSICS LETTERS Yuan, Z., Nainani, A., Bennett, B. R., Boos, J. B., Ancona, M. G., Saraswat, K. C. 2012; 100 (14)

    View details for DOI 10.1063/1.3699226

    View details for Web of Science ID 000302567800071

  • Selective-Area High-Quality Germanium Growth for Monolithic Integrated Optoelectronics IEEE ELECTRON DEVICE LETTERS Yu, H., Park, J., Okyay, A. K., Saraswat, K. C. 2012; 33 (4): 579-581
  • Electroluminescence from strained germanium membranes and implications for an efficient Si-compatible laser APPLIED PHYSICS LETTERS Nam, D., Sukhdeo, D., Cheng, S., Roy, A., Huang, K. C., Brongersma, M., Nishi, Y., Saraswat, K. 2012; 100 (13)

    View details for DOI 10.1063/1.3699224

    View details for Web of Science ID 000302230800012

  • Highly-Strained Germanium as a Gain Medium for Silicon-Compatible Lasers 2012 CONFERENCE ON LASERS AND ELECTRO-OPTICS (CLEO) Sukhdeo, D., Nam, D., Cheng, S., Yuan, Z., Roy, A., Huang, K. C., Brongersma, M., Nishi, Y., Saraswat, K. 2012
  • Performance Improvement of One-Transistor DRAM by Band Engineering IEEE ELECTRON DEVICE LETTERS Pal, A., Nainani, A., Gupta, S., Saraswat, K. C. 2012; 33 (1): 29-31
  • III-Sb MOSFETs: Opportunities and Challenges GRAPHENE, GE/III-V, NANOWIRES, AND EMERGING MATERIALS FOR POST-CMOS APPLICATIONS 4 Nainani, A., Yuan, Z., Kumar, A., Bennett, B. R., Boos, J. B., Saraswat, K. C. 2012; 45 (4): 91-96

    View details for DOI 10.1149/1.3700457

    View details for Web of Science ID 000316890000011

  • III-Sb MOSFETS : Opportunities and Challenges ECS Transactions Nainani, A., Yuan, Z., Kumar, A., Bennett, B., R., Boos, B., J., Saraswat, K., C. 2012; 45 (4): 91-96
  • Beyond interface: the impact of oxide border traps on InGaAs and Ge n-MOSFETs Tech Abstracts IEEE IEDM Lin, D., Saraswat, K. 2012: 28.3.1 - 28.3.4
  • High Quality Germanium Gate Stack by Sulfur Passivation and Novel Ozone Oxidation IEEE SISC Yang, B., Gupta, S., McVittie, J., P., Nishi, Y., Liang, S., Mazsra, W., P., Saraswat, K. 2012
  • Ge on Insulator (GOI) Structure Using Ge Lateral Overgrowth 221st ECS Meeting Nam, J., Fuse, T., Nishi, Y., Saraswat, K., C. 2012
  • Towards High Mobility GeSn Channel nMOSFETs: Improved Surface Passivation using Novel Ozone Oxidation Method Tech Abstracts IEEE IEDM Gupta, S., Vincent, B., Yang, B., Lin, H., C., Gencarelli, F., Lin, J. -Y., J., Saraswat, K. 2012: 16.2.1-16.2.4
  • Demonstration of Electroluminescence from Strained Ge Membrane LED Int. Si-Ge Tech. & Dev. Meet. (ISTDM) Nam, D., Sukhdeo, D., Cheng, S., L., Huang, K., C.-Y., Brongersma, M., Nishi, Y., Saraswat, K. 2012: 98-99
  • Metal-Insulator-Semiconductor Contacts on Ge: Physics and Applications Int. Si-Ge Tech. and Dev. Meet. (ISTDM) Lin, J. -Y., Jason, Roy, A., Sun, Y., Saraswat, K., C. 2012: 90-91
  • Enhancement of Phosphorus Dopant Activation and Diffusion of Suppression by Fluorine Co-implant in Epitaxially grown in Germanium Int. Si-Ge Tech. & Dev. Meet. (ISTDM) Jung, W. S., Nam, J., H., Lin, J, Y., Ryu, S., Nainani, A., Saraswat, K., C. 2012: 16-17
  • III-Sb MOSFETS : Opportunities and Challenges 221st ECS Meeting Nainani, A., Yuan, Z., Kumar, A., Boos, J., Bennett, B., R., Saraswat, K., C. 2012
  • GeSn Channel n and p MOSFETs Presented at 222th Meeting of The Electrochem. Soc. Gupta, S., Chen, R., Vincent, B., Lin, D., Magyari-Kope, B., Caymax, M., Saraswat, K. 2012
  • Optimization of the Al2O3/GaSb Interface and a High-Mobility GaSb pMOSFET J. of Appl. Phys Nainani, A., Irisawa, T., Yuan, Z., Bennett, B., R., Boos, J., B., Nishi, Y., Saraswat, K. 2012; 111 (10): 103706
  • Schottky Barrier Height Engineering for Low Resistance Contacts to Ge and III-V Devices Presented at 222th Meeting of The Electrochem. Soc. Saraswat, Krishna, C., Lin, J. -Y., Jason, Nainani, A., Roy, A., Yang, B., Yuan, Z. 2012
  • Low-contact-resistivity Nickel Germanide Contacts on n+Ge with Phosphorus/Antimony Co-doping and Schottky Barrier Height Lowering Int. Si-Ge Tech. and Dev. Meet. (ISTDM) Yang, B., Lin, J. -Y., Jason, Gupta, S., Roy, A., Lianga, S., Maszara, W., Saraswat, K. 2012: 88-89
  • Impact of fixed charge on metal-insulator-semiconductor barrier height reduction APPLIED PHYSICS LETTERS Hu, J., Nainani, A., Sun, Y., Saraswat, K. C., Wong, H. P. 2011; 99 (25)

    View details for DOI 10.1063/1.3669414

    View details for Web of Science ID 000299031600034

  • Strained germanium thin film membrane on silicon substrate for optoelectronics OPTICS EXPRESS Nam, D., Sukhdeo, D., Roy, A., Balram, K., Cheng, S., Huang, K. C., Yuan, Z., Brongersma, M., Nishi, Y., Miller, D., Saraswat, K. 2011; 19 (27): 25866-25872

    Abstract

    This work presents a novel method to introduce a sustainable biaxial tensile strain larger than 1% in a thin Ge membrane using a stressor layer integrated on a Si substrate. Raman spectroscopy confirms 1.13% strain and photoluminescence shows a direct band gap reduction of 100meV with enhanced light emission efficiency. Simulation results predict that a combination of 1.1% strain and heavy n(+) doping reduces the required injected carrier density for population inversion by over a factor of 60. We also present the first highly strained Ge photodetector, showing an excellent responsivity well beyond 1.6um.

    View details for Web of Science ID 000301151500004

    View details for PubMedID 22274174

  • Effect of interfacial oxide on Ge MOSCAP and N-MOSFET characteristics MICROELECTRONIC ENGINEERING Kuzum, D., Park, J., Krishnamohan, T., Saraswat, K. C. 2011; 88 (12): 3428-3431
  • Optimization of the Al2O3/GaSb Interface and a High-Mobility GaSb pMOSFET IEEE TRANSACTIONS ON ELECTRON DEVICES Nainani, A., Irisawa, T., Yuan, Z., Bennett, B. R., Boos, J. B., Nishi, Y., Saraswat, K. C. 2011; 58 (10): 3407-3415
  • Complex Band Structures: From Parabolic to Elliptic Approximation IEEE ELECTRON DEVICE LETTERS Guan, X., Kim, D., Saraswat, K. C., Wong, H. P. 2011; 32 (9): 1296-1298
  • Metal/III-V effective barrier height tuning using atomic layer deposition of high-kappa/high-kappa bilayer interfaces APPLIED PHYSICS LETTERS Hu, J., Saraswat, K. C., Wong, H. P. 2011; 99 (9)

    View details for DOI 10.1063/1.3633118

    View details for Web of Science ID 000294489300032

  • Thermionic Field Emission Explanation for Nonlinear Richardson Plots IEEE TRANSACTIONS ON ELECTRON DEVICES Kenney, C., Saraswat, K. C., Taylor, B., Majhi, P. 2011; 58 (8): 2423-2429
  • Study of Shubnikov-de Haas oscillations and measurement of hole effective mass in compressively strained InXGa1-XSb quantum wells SOLID-STATE ELECTRONICS Nainani, A., Irisawa, T., Bennett, B. R., Boos, J. B., Ancona, M. G., Saraswat, K. C. 2011; 62 (1): 138-141
  • Optimization of Germanium (Ge) n(+)/p and p(+)/n Junction Diodes and Sub 380 degrees C Ge CMOS Technology for Monolithic Three-Dimensional Integration IEEE TRANSACTIONS ON ELECTRON DEVICES Park, J., Kuzum, D., Yu, H., Saraswat, K. C. 2011; 58 (8): 2394-2400
  • High n-Type Antimony Dopant Activation in Germanium Using Laser Annealing for n(+)/p Junction Diode IEEE ELECTRON DEVICE LETTERS Thareja, G., Chopra, S., Adams, B., Kim, Y., Moffatt, S., Saraswat, K., Nishi, Y. 2011; 32 (7): 838-840
  • InxGa1-xSb channel p-metal-oxide-semiconductor field effect transistors: Effect of strain and heterostructure design JOURNAL OF APPLIED PHYSICS Nainani, A., Yuan, Z., Krishnamohan, T., Bennett, B. R., Boos, J. B., Reason, M., Ancona, M. G., Nishi, Y., Saraswat, K. C. 2011; 110 (1)

    View details for DOI 10.1063/1.3600220

    View details for Web of Science ID 000292776500124

  • Device quality Sb-based compound semiconductor surface: A comparative study of chemical cleaning JOURNAL OF APPLIED PHYSICS Nainani, A., Sun, Y., Irisawa, T., Yuan, Z., Kobayashi, M., Pianetta, P., Bennett, B. R., Boos, J. B., Saraswat, K. C. 2011; 109 (11)

    View details for DOI 10.1063/1.3590167

    View details for Web of Science ID 000292214700167

  • Cavity-enhanced direct band electroluminescence near 1550 nm from germanium microdisk resonator diode on silicon APPLIED PHYSICS LETTERS Cheng, S., Shambat, G., Lu, J., Yu, H., Saraswat, K., Kamins, T. I., Vuckovic, J., Nishi, Y. 2011; 98 (21)

    View details for DOI 10.1063/1.3592837

    View details for Web of Science ID 000291041600001

  • Electrical Characteristics of Germanium n(+)/p Junctions Obtained Using Rapid Thermal Annealing of Coimplanted P and Sb IEEE ELECTRON DEVICE LETTERS Thareja, G., Cheng, S., Kamins, T., Saraswat, K., Nishi, Y. 2011; 32 (5): 608-610
  • Schottky barrier height reduction for metal/n-GaSb contact by inserting TiO2 interfacial layer with low tunneling resistance APPLIED PHYSICS LETTERS Yuan, Z., Nainani, A., Sun, Y., Lin, J. J., Pianetta, P., Saraswat, K. C. 2011; 98 (17)

    View details for DOI 10.1063/1.3584862

    View details for Web of Science ID 000290046100032

  • The Effect of Donor/Acceptor Nature of Interface Traps on Ge MOSFET Characteristics IEEE TRANSACTIONS ON ELECTRON DEVICES Kuzum, D., Park, J., Krishnamohan, T., Wong, H. P., Saraswat, K. C. 2011; 58 (4): 1015-1022
  • Novel Germanium n-MOSFETs With Raised Source/Drain on Selectively Grown Ge on Si for Monolithic Integration IEEE ELECTRON DEVICE LETTERS Yu, H., Kobayashi, M., Park, J., Nishi, Y., Saraswat, K. C. 2011; 32 (4): 446-448
  • N-Channel Germanium MOSFET Fabricated Below 360 degrees C by Cobalt-Induced Dopant Activation for Monolithic Three-Dimensional-ICs IEEE ELECTRON DEVICE LETTERS Park, J., Kuzum, D., Jung, W., Saraswat, K. C. 2011; 32 (3): 234-236
  • Increase in current density for metal contacts to n-germanium by inserting TiO2 interfacial layer to reduce Schottky barrier height APPLIED PHYSICS LETTERS Lin, J. J., Roy, A. M., Nainani, A., Sun, Y., Saraswat, K. C. 2011; 98 (9)

    View details for DOI 10.1063/1.3562305

    View details for Web of Science ID 000288026700041

  • Experimental demonstration of In0.53Ga0.47As field effect transistors with scalable nonalloyed source/drain contacts APPLIED PHYSICS LETTERS Hu, J., Saraswat, K. C., Wong, H. P. 2011; 98 (6)

    View details for DOI 10.1063/1.3553192

    View details for Web of Science ID 000287242100034

  • On the High-Field Transport and Uniaxial Stress Effect in Ge PFETs IEEE TRANSACTIONS ON ELECTRON DEVICES Kobayashi, M., Mitard, J., Irisawa, T., Hoffmann, T., Meuris, M., Saraswat, K., Nishi, Y., Heyns, M. 2011; 58 (2): 384-391
  • Novel contact structures for high mobility channel materials MRS BULLETIN Hu, J., Wong, H. P., Saraswat, K. 2011; 36 (2): 112-119

    View details for DOI 10.1557/mrs.2011.5

    View details for Web of Science ID 000293232300012

  • Inelastic electron tunneling study of crystallization effects and defect energies in hafnium oxide gate dielectrics APPLIED PHYSICS LETTERS Kim, E. J., Shandalov, M., Saraswat, K. C., McIntyre, P. C. 2011; 98 (3)

    View details for DOI 10.1063/1.3527977

    View details for Web of Science ID 000286471100026

  • High-Mobility Ge N-MOSFETs and Mobility Degradation Mechanisms IEEE TRANSACTIONS ON ELECTRON DEVICES Kuzum, D., Krishnamohan, T., Nainani, A., Sun, Y., Pianetta, P. A., Wong, H. P., Saraswat, K. C. 2011; 58 (1): 59-66
  • Strained Germanium Membrane using Thin Film Stressor for High Efficiency Laser 2011 CONFERENCE ON LASERS AND ELECTRO-OPTICS (CLEO) Nam, D., Roy, A. M., Huang, K. C., Brongersma, M. L., Saraswat, K. C. 2011
  • A Novel Optoelectronic Device Complimentary to Photodetector 2011 OPTICAL FIBER COMMUNICATION CONFERENCE AND EXPOSITION (OFC/NFOEC) AND THE NATIONAL FIBER OPTIC ENGINEERS CONFERENCE Na, Y., Ly-Gagnon, D., Miller, D. A., Saraswat, K. C. 2011
  • GeSn Technology: Extending the Ge Electronics Roadmap 2011 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM) Gupta, S., Chen, R., Magyari-Kope, B., Lin, H., Yang, B., Nainani, A., Nishi, Y., Harris, J. S., Saraswat, K. C. 2011
  • Simulation of spin MOSFETs SPINTRONICS IV Roy, A. M., Nikonov, D. E., Saraswat, K. C. 2011; 8100

    View details for DOI 10.1117/12.893171

    View details for Web of Science ID 000295779800026

  • Analytical Approximation of Complex Band Structures for Band-to-Band Tunneling Models IEEE SISPAD Guan, X., Kim, D., Saraswat, K., C., Wong, H. -S., P. 2011
  • Tight-binding Study of Bandstructure Engineering for Ballistic III-V nMOSFETs IEEE SISPAD Yuan, Z., Nainani, A., Guan, X., Wong, H. -S., P., Saraswat, K., C. 2011
  • Junctions Obtained Using Rapid Thermal Annealing of Co-implantated P and Sb IEEE Electron Dev. Lett. Thareja, G., Cheng, S., Kamins, T., I., Saraswat, K., C., Nishi, Y. 2011; 32 (5): 608-610
  • InGaSb channel p-metal-oxide-semiconductor field effect transistors: Effect of strain and heterostructure design J Appl. Phys. Nainani, A., Yuan, Z., Krishnamohan, T., Nishi, Y., Saraswat, K., C., Bennett, B., R. 2011; 110 (1): 014503
  • Atomic Layer Deposition of Al2O3 on GeSn and Impact of Wet Chemical Surface Pre-Treatment IEEE SISC Gupta, S., Chen, R., Harris, J., Saraswat, K., C. 2011
  • Optimization of Al2O3/GaSb interface and a high mobility GaSb p-MOSFET IEEE Trans. Electron Dev. Nainani, A., Irisawa, T., Yuan, Z., Bennett, B., R., Boos, J., B., Nishi, Y., Saraswat, K. 2011; 58 (10): 3407-3415
  • High Mobility Ge N-MOSFETs and Mobility Degradation Mechanisms IEEE Trans. Electron Dev. Kuzum, D., Krishnamohan, T., Nainani, A., Sun, Y., Pianetta, P., A., Wong, H. -S., Philip, Saraswat, K. 2011; 58 (1): 59-66
  • Increase in current density and effective Schottky barrier height reduction for metal contact to n-type GaSb using interfacial layer of TiO2 Appl. Phys. Lett. Yuan, Z., Nainani, A., Sun, Y., Lin, J, Y., Pianetta, P., Saraswat, K., C. 2011; 98: 172106
  • Specific Contact Resistivity of Tunnel Barrier Contacts Used for Fermi Level Depinning IEEE ELECTRON DEVICE LETTERS Roy, A. M., Lin, J. Y., Saraswat, K. C. 2010; 31 (10): 1077-1079
  • High quality single-crystal germanium-on-insulator on bulk Si substrates based on multistep lateral over-growth with hydrogen annealing APPLIED PHYSICS LETTERS Yu, H., Cheng, S., Park, J., Okyay, A. K., Onbasli, M. C., Ercan, B., Nishi, Y., Saraswat, K. C. 2010; 97 (6)

    View details for DOI 10.1063/1.3478242

    View details for Web of Science ID 000280940900089

  • Study of piezoresistance under unixial stress for technologically relevant III-V semiconductors using wafer bending experiments APPLIED PHYSICS LETTERS Nainani, A., Yum, J., Barnett, J., Hill, R., Goel, N., Huang, J., Majhi, P., Jammy, R., Saraswat, K. C. 2010; 96 (24)

    View details for DOI 10.1063/1.3436561

    View details for Web of Science ID 000278911500028

  • Uniaxial Stress Engineering for High-Performance Ge NMOSFETs IEEE TRANSACTIONS ON ELECTRON DEVICES Kobayashi, M., Irisawa, T., Magyari-Koepe, B., Saraswat, K., Wong, H. P., Nishi, Y. 2010; 57 (5): 1037-1046
  • Novel Capacitorless Single-Transistor Charge-Trap DRAM (1T CT DRAM) Utilizing Electrons IEEE ELECTRON DEVICE LETTERS Ertosun, M. G., Lim, K., Park, C., Oh, J., Kirsch, P., Saraswat, K. C. 2010; 31 (5): 405-407
  • Conductivity mismatch and voltage dependence of magnetoresistance in a semiconductor spin injection device JOURNAL OF APPLIED PHYSICS Roy, A. M., Nikonov, D. E., Saraswat, K. C. 2010; 107 (6)

    View details for DOI 10.1063/1.3319570

    View details for Web of Science ID 000276210800106

  • Metal/III-V Schottky barrier height tuning for the design of nonalloyed III-V field-effect transistor source/drain contacts JOURNAL OF APPLIED PHYSICS Hu, J., Saraswat, K. C., Wong, H. P. 2010; 107 (6)

    View details for DOI 10.1063/1.3327434

    View details for Web of Science ID 000276210800057

  • Investigation of Capacitorless Double-Gate Single-Transistor DRAM: With and Without Quantum Well IEEE TRANSACTIONS ON ELECTRON DEVICES Ertosun, M. G., Saraswat, K. C. 2010; 57 (3): 608-613
  • The influence of Fermi level pinning/depinning on the Schottky barrier height and contact resistance in Ge/CoFeB and Ge/MgO/CoFeB structures APPLIED PHYSICS LETTERS Lee, D., Raghunathan, S., Wilson, R. J., Nikonov, D. E., Saraswat, K., Wang, S. X. 2010; 96 (5)

    View details for DOI 10.1063/1.3285163

    View details for Web of Science ID 000274319500073

  • Border traps in Al2O3/In0.53Ga0.47As (100) gate stacks and their passivation by hydrogen anneals APPLIED PHYSICS LETTERS Kim, E. J., Wang, L., Asbeck, P. M., Saraswat, K. C., McIntyre, P. C. 2010; 96 (1)

    View details for DOI 10.1063/1.3281027

    View details for Web of Science ID 000273473200037

  • Leakage Current Analysis of Lateral p+/n Ge Based Diode Activated at Low Temperature for Three-Dimensional Integrated Circuit (3D-ICs) PROCESSING, MATERIALS, AND INTEGRATION OF DAMASCENE AND 3D INTERCONNECTS Jung, W. S., Park, J., Kuzum, D., Kim, W., Wong, S., Saraswat, K. C. 2010; 33 (12): 35-39

    View details for DOI 10.1149/1.3501032

    View details for Web of Science ID 000315439100003

  • Novel SiGe Source/Drain for Reduced Parasitic Resistance in Ge NMOS SIGE, GE, AND RELATED COMPOUNDS 4: MATERIALS, PROCESSING, AND DEVICES Raghunathan, S., Krishnamohan, T., Saraswat, K. 2010; 33 (6): 871-876

    View details for DOI 10.1149/1.3487617

    View details for Web of Science ID 000314957600088

  • Novel Electronic and Optoelectronic Devices in Germanium Integrated on Silicon SIGE, GE, AND RELATED COMPOUNDS 4: MATERIALS, PROCESSING, AND DEVICES Saraswat, K. C. 2010; 33 (6): 101-108

    View details for DOI 10.1149/1.3487538

    View details for Web of Science ID 000314957600009

  • Low Temperature Germanium Growth on Silicon Oxide Using Boron Seed Layer and In Situ Dopant Activation JOURNAL OF THE ELECTROCHEMICAL SOCIETY Tada, M., Park, J., Kuzum, D., Thareja, G., Jain, J. R., Nishi, Y., Saraswat, K. C. 2010; 157 (3): H371-H376

    View details for DOI 10.1149/1.3295703

    View details for Web of Science ID 000274321900093

  • Optimal Design of III-V Heterostructure MOSFETs SISPAD 2010 - 15TH INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES Nainani, A., Yuan, Z., Krishnamohan, T., Saraswat, K. 2010: 103-106
  • Development of High-k Dielectric for Antimonides and a Sub 350ºC III-V pMOSFET Outperforming Germanium IEEE Int. Electron Dev. Meet. (IEDM) Technical Digest Nainani, A., Irisawa, T., Yuan, Z., Sun, Y., Krishnamohan, T., Reason, M., Saraswat, K. 2010: 6.4.1-6.4.4
  • Experimental Demonstration of High Source Velocity and Its Enhancement by Uniaxial Stress in Ge PFETs 2010 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS Kobabyashi, M., Mitard, J., Irisawa, T., Hoffmann, T., Meuris, M., Saraswat, K., Nishi, Y., Heyns, M. 2010: 215-216
  • Characterizations of direct band gap PL and EL from epi-Ge on Si ECS Transactions Cheng, S., Shambat, G., Lu, J., Yu, H., Saraswat, K., C., Vuckovic, J. 2010; 33 (6): 545-554
  • Performance Limitations of Cu/low-K Interconnects and Possible Future Alternatives IEEE IITC short course Saraswat, Krishna, C. 2010
  • Germanium Integration on Silicon for High Performance MOSFETs and Optical Interconnects MRS spring meeting Saraswat, Krishna, C. 2010
  • High Performance Germanium N-MOSFET with Antimony Dopant Activation Beyond 1x1020 cm-3 EEE Int. Electron Dev. Meet. (IEDM) Technical Digest Thareja, G., Liang, J., Chopra, S., Adams, B., Patil, N., Cheng, S., L., Saraswat, K. 2010: 10.5.1-10.5.4
  • Characteristics of surface states and charge neutrality level in Ge APPLIED PHYSICS LETTERS Kuzum, D., Martens, K., Krishnamohan, T., Saraswat, K. C. 2009; 95 (25)

    View details for DOI 10.1063/1.3270529

    View details for Web of Science ID 000273037700021

  • Atomically abrupt and unpinned Al2O3/In0.53Ga0.47As interfaces: Experiment and simulation JOURNAL OF APPLIED PHYSICS Kim, E. J., Chagarov, E., Cagnon, J., Yuan, Y., Kummel, A. C., Asbeck, P. M., Stemmer, S., Saraswat, K. C., McIntyre, P. C. 2009; 106 (12)

    View details for DOI 10.1063/1.3266006

    View details for Web of Science ID 000273216500098

  • Radical oxidation of germanium for interface gate dielectric GeO2 formation in metal-insulator-semiconductor gate stack JOURNAL OF APPLIED PHYSICS Kobayashi, M., Thareja, G., Ishibashi, M., Sun, Y., Griffin, P., McVittie, J., Pianetta, P., Saraswat, K., Nishi, Y. 2009; 106 (10)

    View details for DOI 10.1063/1.3259407

    View details for Web of Science ID 000272932300103

  • High-Efficiency p-i-n Photodetectors on Selective-Area-Grown Ge for Monolithic Integration IEEE ELECTRON DEVICE LETTERS Yu, H., Ren, S., Jung, W. S., Okyay, A. K., Miller, D. A., Saraswat, K. C. 2009; 30 (11): 1161-1163
  • Effect of uniaxial-strain on Ge p-i-n photodiodes integrated on Si APPLIED PHYSICS LETTERS Yu, H., Kim, D., Ren, S., Kobayashi, M., Miller, D. A., Nishi, Y., Saraswat, K. C. 2009; 95 (16)

    View details for DOI 10.1063/1.3254181

    View details for Web of Science ID 000271218200006

  • Metal-induced dopant (boron and phosphorus) activation process in amorphous germanium for monolithic three-dimensional integration JOURNAL OF APPLIED PHYSICS Park, J., Tada, M., Jung, W., Wong, H. P., Saraswat, K. C. 2009; 106 (7)

    View details for DOI 10.1063/1.3238297

    View details for Web of Science ID 000270915600118

  • Compact Performance Models and Comparisons for Gigascale On-Chip Global Interconnect Technologies IEEE TRANSACTIONS ON ELECTRON DEVICES Koo, K., Kapur, P., Saraswat, K. C. 2009; 56 (9): 1787-1798
  • Germanium In Situ Doped Epitaxial Growth on Si for High-Performance n(+)/p-Junction Diode IEEE ELECTRON DEVICE LETTERS Yu, H., Cheng, S., Griffin, P. B., Nishi, Y., Saraswat, K. C. 2009; 30 (9): 1002-1004
  • Room temperature 1.6 microm electroluminescence from Ge light emitting diode on Si substrate. Optics express Cheng, S., Lu, J., Shambat, G., Yu, H., Saraswat, K., Vuckovic, J., Nishi, Y. 2009; 17 (12): 10019-10024

    Abstract

    We report the room temperature electroluminescence (EL) at 1.6 microm of a Ge n+/p light emitting diode on a Si substrate. Unlike normal electrically pumped devices, this device shows a super linear luminescence enhancement at high current. By comparing different n type doping concentrations, we observe that a higher concentration is required to achieve better efficiency of the device. Thermal enhancement effects observed in temperature dependent EL spectra show the capability of this device to operate at room temperature or above. These detailed studies show that Ge can be a good candidate for a Si compatible light emitting device.

    View details for PubMedID 19506652

  • p-Channel Ge MOSFET by Selectively Heteroepitaxially Grown Ge on Si IEEE ELECTRON DEVICE LETTERS Yu, H., Ishibashi, M., Park, J., Kobayashi, M., Saraswat, K. C. 2009; 30 (6): 675-677
  • Ge (100) and (111) N- and P-FETs With High Mobility and Low-T Mobility Characterization IEEE TRANSACTIONS ON ELECTRON DEVICES Kuzum, D., Pethe, A. J., Krishnamohan, T., Saraswat, K. C. 2009; 56 (4): 648-655
  • Fermi level depinning in metal/Ge Schottky junction for metal source/drain Ge metal-oxide-semiconductor field-effect-transistor application JOURNAL OF APPLIED PHYSICS Kobayashi, M., Kinoshita, A., Saraswat, K., Wong, H. P., Nishi, Y. 2009; 105 (2)

    View details for DOI 10.1063/1.3065990

    View details for Web of Science ID 000262970900048

  • Characteristics of the Capacitorless Double Gate Quantum Well Single Transistor DRAM 2009 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES Ertosun, M. G., Saraswat, K. C. 2009: 35-38
  • Hole Mobility and its enhancement with Strain for technologically relevant III-V semiconductors 2009 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES Nainani, A., Kim, D., Krishnamohan, T., Saraswat, K. 2009: 47-50
  • Investigation of Ballistic Current in Scaled Floating-gate NAND FLASH and a Solution 2009 IEEE INTERNATIONAL ELECTRON DEVICES MEETING Raghunathan, S., Krishnamohan, T., Parat, K., Saraswat, K. 2009: 765-768
  • Experimental Demonstration of High Mobility Ge NMOS 2009 IEEE INTERNATIONAL ELECTRON DEVICES MEETING Kuzum, D., Krishnamohan, T., Nainani, A., Sun, Y., Pianetta, P. A., Wong, H., Saraswat, K. C. 2009: 420-423
  • Effect of uniaxial-strain on Ge p-i-n photodiodes integrated on Si 2009 IEEE LEOS ANNUAL MEETING CONFERENCE PROCEEDINGS, VOLS 1AND 2 Yu, H., Ren, S., Kobayashi, M., Miller, D. A., Nishi, Y., Saraswat, K. C. 2009: 369-370
  • Performance Comparison between Capacitively Driven Low Swing and Conventional Interconnects for Cu and Carbon Nanotube Wire Technologies PROCEEDINGS OF THE 2009 IEEE INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE Koo, K., Kapur, P., Park, J., Noh, H., Wong, S. S., Saraswat, K. C. 2009: 23-25
  • Performance Comparison of Cu/Low-K, Carbon Nanotube, and Optics for On-chip and Off-chip Interconnects 11TH INTERNATIONAL WORKSHOP ON SYSTEM-LEVEL INTERCONNECT PREDICTION (SLIP 09) Saraswat, K. C. 2009: 111-112
  • Conductivity Mismatch and Voltage Dependence of Magnetoresistance in a Semiconductor Spin Injection and Detection Structure 2009 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES Roy, A. M., Nikonov, D. E., Saraswat, K. 2009: 17-20
  • Low-Temperature, Low-Pressure Chemical Vapor Deposition and Solid Phase Crystallization of Silicon-Germanium Films JOURNAL OF THE ELECTROCHEMICAL SOCIETY Tada, M., Park, J., Jain, J. R., Saraswat, K. C. 2009; 156 (1): D23-D27

    View details for DOI 10.1149/1.3008009

    View details for Web of Science ID 000261209800051

  • High Quality GeO2/Ge Interface Formed by SPA Radical Oxidation and Uniaxial Stress Engineering for High Performance Ge NMOSFETs 2009 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS Kobayashi, M., Irisawa, T., Kope, B. M., Sun, Y., Saraswat, K., Wong, H. P., Pianetta, P., Nishi, Y. 2009: 76-77
  • Fermi Level Depinning For the Design of III-V FET Source/Drain Contacts PROCEEDINGS OF TECHNICAL PROGRAM: 2009 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATIONS Hu, J., Guan, X., Choi, D., Harris, J. S., Saraswat, K., Wong, H. P. 2009: 123-124
  • High Performance n-MOSFETs with Novel Source/Drain on Selectively Grown Ge on Si for Monolithic Integration 2009 IEEE INTERNATIONAL ELECTRON DEVICES MEETING Yu, H., Kobayashi, M., Jung, W. S., Okyay, A. K., Nishi, Y., Saraswat, K. C. 2009: 641-644
  • Physical & Electrical Characterization of Fluorine Passivation for Improving Band-Engineered -SiO2/HfSiO/SiO2 (OHO) TANOS Flash Memory SISC 2009. Verma, S., Gilmer, D., C., Lysaght, P., Price, J., Bersuker, G., Kirsch, P., D., Saraswat, K. 2009
  • Engineering of Strained III-V Heterostructures for High Hole Mobility Int. Electron Dev. Meet. (IEDM) Technical Digest Nainani, A., Raghunathan, S., Witte, D., Kobayashi, M., Irisawa, T., Krishnamohan, T., Saraswat, K. 2009: 857-860
  • 3-D ICs: Motivation, Performance Analysis and Technology 19th Lithography Workshop Saraswat, K., C. 2009
  • High Performance Nanoscale FETs and Optoelectronic Devices for Interconnects in Germanium Integrated on Silicon 1st Int. Workshop on Si based nanoelectronics and photonics (SiNEP-09) Saraswat, Krishna, C. 2009
  • Engineering the Complete MANOS-type NVM Stack for Best in Class Retention Performance IEEE Int. Electron Dev. Meet. (IEDM) Technical Digest Gilmer, D., C., Goel, N., Park, H., Park, C., Verma, S., Bersuker, G., Saraswat, K. 2009: 439-442
  • Investigation of Strained-Sb Hetrostructures with High Hole Mobility SSDM Nainani, A., Kobayashi, M., Witte, D., Irisawa, T., Krishnamohan, T., Saraswat, K. 2009
  • Band Engineered Tunnel Oxides for Improved TANOS-type Flash Program/Erase with Good Retention and 100K Cycle Endurance IEEE VLSI Tech. Systems & Appls. (VLSI-TSA) Gilmer, David, C., Goel, N., Verma, S., Park, H., Park, C., Bersuker, G., Saraswat, K. 2009
  • Correlation between Inelastic Electron Tunneling Spectroscopy and electrical measurements of ultra-thin high density Plasma gate oxides for MOS devices MRS Abstract 1 IETS April 2009 Kim, E., Thareja, G., Saraswat, K., C., McIntyre, P., C., Nishi, Y. 2009
  • High Mobility Ge NMOS and Its Challenges Int. Electron Dev. Meet. (IEDM) Technical Digest Kuzum, D., Krishnamohan, T., Nainani, A., Sun, Y., Pianetta, P., A., Wong, H. -S., P., Saraswat, K. 2009: 453-456
  • A Novel Fluorine Incorporated Band Engineered (BE) Tunnel (SiO2/ HfSiO/ SiO2) TANOS with excellent Program/Erase and Endurance to 105 cycles IMW`09 Monterey Verma, S., Bersuker, G., Gilmer, D., C., Padovani, A., Park, H., Nainani, A., Saraswat, K. 2009
  • A Highly Scalable Capacitorless Double Gate Quantum Well Single Transistor DRAM: 1T-QW DRAM IEEE ELECTRON DEVICE LETTERS Ertosun, M. G., Kapur, P., Saraswat, K. C. 2008; 29 (12): 1405-1407
  • High performance germanium N+/P and P+/N junction diodes formed at low Temperature (<= 380 degrees C) using metal-induced dopant activation APPLIED PHYSICS LETTERS Park, J., Kuzum, D., Tada, M., Saraswat, K. C. 2008; 93 (19)

    View details for DOI 10.1063/1.3025849

    View details for Web of Science ID 000260944100121

  • Low temperature boron and phosphorus activation in amorphous germanium using Ni- and Co-induced crystallization and its application for three-dimensional integrated circuits APPLIED PHYSICS LETTERS Park, J., Tada, M., Kapur, P., Saraswat, K. C. 2008; 93 (18)

    View details for DOI 10.1063/1.3009201

    View details for Web of Science ID 000260778100096

  • Self-nucleation free and dimension dependent metal-induced lateral crystallization of amorphous germanium for single crystalline germanium growth on insulating substrate JOURNAL OF APPLIED PHYSICS Park, J., Tada, M., Kapur, P., Peng, H., Saraswat, K. C. 2008; 104 (6)

    View details for DOI 10.1063/1.2978367

    View details for Web of Science ID 000260119300144

  • Experimental characterization of single-walled carbon nanotube film-Si Schottky contacts using metal-semiconductor-metal structures APPLIED PHYSICS LETTERS Behnam, A., Johnson, J. L., Choi, Y., Ertosun, M. G., Okyay, A. K., Kapur, P., Saraswat, K. C., Ural, A. 2008; 92 (24)

    View details for DOI 10.1063/1.2945644

    View details for Web of Science ID 000256934900090

  • Metal-semiconductor-metal photodetectors based on single-walled carbon nanotube film-GaAs Schottky contacts JOURNAL OF APPLIED PHYSICS Behnam, A., Johnson, J., Choi, Y., Noriega, L., Ertosun, M. G., Wu, Z., Rinzler, A. G., Kapur, P., Saraswat, K. C., Ural, A. 2008; 103 (11)

    View details for DOI 10.1063/1.2938037

    View details for Web of Science ID 000256706200101

  • A nanoscale vertical double-gate single-transistor capacitorless DRAM IEEE ELECTRON DEVICE LETTERS Ertosun, M. G., Cho, H., Kapur, P., Saraswat, K. C. 2008; 29 (6): 615-617
  • Nanometre-scale germanium photodetector enhanced by a near-infrared dipole antenna NATURE PHOTONICS Tang, L., Kocabas, S. E., Latif, S., Okyay, A. K., Ly-Gagnon, D., Saraswat, K. C., Miller, D. A. 2008; 2 (4): 226-229
  • Ge-interface engineering with ozone oxidation for low interface-state density IEEE ELECTRON DEVICE LETTERS Kuzum, D., Krishnamohan, T., Pethe, A. J., Okyay, A. K., Oshima, Y., Sun, Y., McVittie, J. P., Pianetta, P. A., McIntyre, P. C., Saraswat, K. C. 2008; 29 (4): 328-330
  • Operational voltage reduction of flash memory using high-kappa composite tunnel barriers IEEE ELECTRON DEVICE LETTERS Verma, S., Pop, E., Kapur, P., Parat, K., Saraswat, K. C. 2008; 29 (3): 252-254
  • On the correct extraction of interface trap density of MOS devices with high-mobility semiconductor substrates IEEE TRANSACTIONS ON ELECTRON DEVICES Martens, K., Chui, C. O., Brammertz, G., De Jaeger, B., Kuzum, D., Meuris, M., Heyns, M. M., Krishnamohan, T., Saraswat, K., Maes, H. E., Groeseneken, G. 2008; 55 (2): 547-556
  • A low-power, highly scalable, vertical double-gate MOSFET using novel processes IEEE TRANSACTIONS ON ELECTRON DEVICES Cho, H., Kapur, P., Kalavade, P., Saraswat, K. C. 2008; 55 (2): 632-639
  • Comparison of (001), (110) and (111) Uniaxial- and Biaxial- Strained-Ge and Strained-Si PMOS DGFETs for All Channel orientations: Mobility Enhancement, Drive Current, Delay and Off-State Leakage IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2008, TECHNICAL DIGEST Krishnamohan, T., Kim, D., Dinh, T. V., Pham, A., Meinerzhagen, B., Jungemann, C., Saraswat, K. 2008: 899-902
  • Fermi-level depinning in metal/Ge Schottky junction and its application to metal source/drain GeNMOSFET 2008 SYMPOSIUM ON VLSI TECHNOLOGY Kobayashi, M., Kinoshita, A., Saraswat, K., Wong, H. P., Nishi, Y. 2008: 43-44
  • Performance comparison between copper, carbon nanotube, and optical interconnects PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10 Saraswat, K., Cho, H., Kapur, P., Koo, K. 2008: 2781-2784
  • Performance Evaluation of Uniaxial- and Biaxial-Strained In((x))Ga((1-x))AS NMOS DGFETs SISPAD: 2008 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES Kim, D., Krishnamohan, T., Saraswat, K. C. 2008: 101-104
  • Mobilty Modeling Of Strained Germanium (s-Ge) Quantum Well (QW) Heterostructure pMOSFETs SIGE, GE, AND RELATED COMPOUNDS 3: MATERIALS, PROCESSING, AND DEVICES Krishnamohan, T., Pham, A., Jungemann, C., Meinerzhagen, B., Saraswat, K. C. 2008; 16 (10): 397-403

    View details for DOI 10.1149/1.2986797

    View details for Web of Science ID 000273336700048

  • Performance Evaluation of 15nm Gate Length Double-Gate n-MOSFETs with High Mobility Channels: III-V, Ge and Si SIGE, GE, AND RELATED COMPOUNDS 3: MATERIALS, PROCESSING, AND DEVICES Kim, D., Krishnamohan, T., Saraswat, K. C. 2008; 16 (10): 47-55

    View details for DOI 10.1149/1.2986752

    View details for Web of Science ID 000273336700005

  • Fermi-level depinning in metal/Ge Schottky junction and its application to metal source/drainage NMOSFET 2008 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS Kobayashi, M., Kinoshita, A., Saraswat, K., Wong, H. P., Nishi, Y. 2008: 54-55
  • Defect Reduction of Ge on Si by Selective Epitaxy and Hydrogen Annealing SIGE, GE, AND RELATED COMPOUNDS 3: MATERIALS, PROCESSING, AND DEVICES Yu, H., Park, J., Okyay, A. K., Saraswat, K. C. 2008; 16 (10): 823-828

    View details for DOI 10.1149/1.2986841

    View details for Web of Science ID 000273336700091

  • Passivation studies of germanium surfaces ULTRA CLEAN PROCESSING OF SEMICONDUCTOR SURFACES VIII Kim, J., McVittie, J., Saraswat, K., Nishi, Y. 2008; 134: 33-36
  • Theoretical Evaluation of Performance in Biaxially-Strained GaAs and In0.75Ga0.25As NMOS DGFETs 2008 IEEE SILICON NANOELECTRONICS WORKSHOP Kim, D., Krishnamohan, T., Saraswat, K. C. 2008: 103-104
  • Atomic Layer Deposition of Hafnium Oxide on Ge and GaAs Substrates: Precursors and Surface Preparation JOURNAL OF THE ELECTROCHEMICAL SOCIETY Delabie, A., Brunco, D. P., Conard, T., Favia, P., Bender, H., Franquet, A., Sioncke, S., Vandervorst, W., Van Elshocht, S., Heyns, M., Meuris, M., Kim, E., McIntyre, P. C., Saraswat, K. C., LeBeau, J. M., Cagnon, J., Stemmer, S., Tsai, W. 2008; 155 (12): H937-H944

    View details for DOI 10.1149/1.2979144

    View details for Web of Science ID 000260479700068

  • Chemical Bonding, Interfaces, and Defects in Hafnium Oxide/Germanium Oxynitride Gate Stacks on Ge(100) JOURNAL OF THE ELECTROCHEMICAL SOCIETY Oshima, Y., Sun, Y., Kuzum, D., Sugawara, T., Saraswat, K. C., Pianetta, P., McIntyrea, P. C. 2008; 155 (12): G304-G309

    View details for DOI 10.1149/1.2995832

    View details for Web of Science ID 000260479700067

  • Performance comparisons between Cu/Low-kappa, carbon-nanotube, and optics for future on-chip interconnects IEEE ELECTRON DEVICE LETTERS Cho, H., Koo, K., Kapur, P., Saraswat, K. C. 2008; 29 (1): 122-124
  • Double-Gate Strained-Ge Heterostructure Tunneling FET (TFET) With Record High Drive Currents and <60mV/dec Subthreshold slope IEEE International Electron Devices Meeting (IEDM) 2008 Technical Digest Krishnamohan, T., Kim, D., Raghunathan, S., Saraswat, K., C. 2008: 947-949
  • Low Temperature (<380∞C) and High Performance Ge CMOS Technology with Novel Source/Drain by Metal-Induced Dopants Activation and High-K/Metal Gate Stack for Monolithic 3D Integration IEEE International Electron Devices Meeting (IEDM) 2008 Technical Digest Park, J., Tada, M., Kuzum, D., Kapur, P., Yu, H. -Y., Wong, H. -S., Philip, Saraswat, K. 2008: 389-392
  • Low Temperature Boron Activation in Amorphous Ge for Three Dimensional Integrated Circuits (3D-ICs) using Ni-induced Crystallization The Electroch. Soc. Trans. Park, J., Tada, M., Yu, H., Kuzum, D., Na, Y., Saraswat, K. 2008; 10 (16 #): 909-916
  • Mobilty Modeling in Ultra-Thin (UT) Strained Germanium (s-Ge) Quantum Well (QW) Heterostructure pMOSFETs The Electroch. Soc. Trans. Krishnamohan, T., Pham, A., Jungemann, C., Meinerzhagen, B., Saraswat, K. 2008; 10 (16 #): 397-403
  • Ge Interface Engineering with Ozone-oxidation for Low Interface State Density IEEE Electron Dev. Lett Kuzum, D., Krishnamohan, T., Pethe, A., J., Okyay, A., K., Oshima, Y., Sun, Y., Saraswat, K. 2008; 29 (4): 328-330
  • A Low Power, Highly Scalable, Vertical Double Gate MOSFET Using Novel Processes IEEE Trans. Electron Dev. Cho, H., Kapur, P., Kalavade, P., Saraswat, K., C. 2008; 55 (2): 632-639
  • Performance Comparisons Between Cu/Low-K Carbon-Nanotube, And Optics for Future On-Chip Interconnects IEEE Electron Dev. Lett. Koo, K., Cho, H., Kapur, P., Saraswat, Krishna, C. 2008; 29 (1): 122-124
  • Passivation studies of germanium surfaces Solid State Phenomena Kim, J., McVittie, J., Saraswat, K., Nishi, Y. 2008; 134: 33-6
  • Germanium for High Performance MOSFETs and Optical Interconnects The Electrochemical Society Transactions Saraswat, K., C., Kim, D., Krishnamohan, T., Kuzum, D., Okyay, A., K., Pethe, A. 2008; 10 (16 #): 3-12
  • High Mobility Ge and III-V Materials and Novel Device Structures for High Performance Nanoscale MOSFETS ESSDERC Krishnamohan, T., Saraswat, K., C. 2008
  • Ge Interface Passivation Techniques and Their Thermal Stability SIGE, GE, AND RELATED COMPOUNDS 3: MATERIALS, PROCESSING, AND DEVICES Kuzum, D., Krishnamohan, T., Pethe, A., Oshima, Y., Sun, Y., McVittie, J., Pianetta, P. A., McIntyre, P. C., Saraswat, K. C. 2008; 16 (10): 1025-1029

    View details for DOI 10.1149/1.2986865

    View details for Web of Science ID 000273336700114

  • Mobilty Modeling of Strained Germanium (s-Ge) Quantum Well (QW) heterostructure pMOSFETs 2008 IEEE SILICON NANOELECTRONICS WORKSHOP Krishnamohan, T., Pham, A., Jungemann, C., Meinerzhagen, B., Saraswat, K. C. 2008: 15-16
  • Performance comparisons between carbon nanotubes, optical, and Cu for future high-performance on-chip interconnect applications IEEE TRANSACTIONS ON ELECTRON DEVICES Koo, K., Cho, H., Kapur, P., Saraswat, K. C. 2007; 54 (12): 3206-3215
  • Silicon germanium CMOS optoelectronic switching device: Bringing light to latch IEEE TRANSACTIONS ON ELECTRON DEVICES Okyay, A. K., Kuzum, D., Latif, S., Miller, D. A., Saraswat, K. C. 2007; 54 (12): 3252-3259
  • A very low temperature single crystal germanium growth process on insulating substrate using Ni-induced lateral crystallization for three-dimensional integrated circuits APPLIED PHYSICS LETTERS Park, J., Kapur, P., Saraswat, K. C., Peng, H. 2007; 91 (14)

    View details for DOI 10.1063/1.2793183

    View details for Web of Science ID 000249974100097

  • Ge-SiGe quantum-well waveguide photodetectors on silicon for the near-infrared IEEE PHOTONICS TECHNOLOGY LETTERS Fidaner, O., Okyay, A. K., Roth, J. E., Schaevitz, R. K., Kuo, Y., Saraswat, K. C., Harris, J. S., Miller, D. A. 2007; 19 (17-20): 1631-1633
  • SiGe optoelectronic metal-oxide semiconductor field-effect transistor OPTICS LETTERS Okyay, A. K., Pethe, A. J., Kuzum, D., Latif, S., Miller, D. A., Saraswat, K. C. 2007; 32 (14): 2022-2024

    Abstract

    We propose a novel semiconductor optoelectronic switch that is a fusion of a Ge optical detector and a Si metal-oxide semiconductor field-effect transistor (MOSFET). The device operation is investigated with simulations and experiments. The switch can be fabricated at the nanoscale with extremely low capacitance. This device operates in telecommunication standard wavelengths, hence providing the surrounding Si circuitry with noise immunity from signaling. The Ge gate absorbs light, and the gate photocurrent is amplified at the drain terminal. Experimental current gain of up to 1000x is demonstrated. The device exhibits increased responsivity (approximately 3.5x) and lower off-state current (approximately 4x) compared with traditional detector schemes.

    View details for Web of Science ID 000248669200022

    View details for PubMedID 17632630

  • Electro-thermally coupled power optimization for future transistors and its applications IEEE TRANSACTIONS ON ELECTRON DEVICES Chao, A. K., Kapur, P., Morifuji, E., Saraswat, K., Nishi, Y. 2007; 54 (7): 1696-1704
  • Modulator design methodology minimizing power dissipation in a quantum well modulator-based optical interconnect JOURNAL OF LIGHTWAVE TECHNOLOGY Cho, H., Kapur, P., Saraswat, K. C. 2007; 25 (6): 1621-1628
  • High temperature phase transformation of tantalum nitride films deposited by plasma enhanced atomic layer deposition for gate electrode applications APPLIED PHYSICS LETTERS Sreenivasana, R., Sugawara, T., Saraswat, K. C., McIntyre, P. C. 2007; 90 (10)

    View details for DOI 10.1063/1.2643085

    View details for Web of Science ID 000244791700042

  • The delay, energy, and bandwidth comparisons between copper, carbon nanotube, and optical interconnects for local and global wiring application PROCEEDINGS OF THE IEEE 2007 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE Cho, H., Koo, K., Kapur, P., Saraswat, K. C. 2007: 135-137
  • High mobility channel materials for future CMOS 2007 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATIONS (VLSI-TSA), PROCEEDINGS OF TECHNICAL PAPERS Saraswat, K. C. 2007: 116-119
  • Highly scalable vertical double gate NOR flash memory 2007 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, VOLS 1 AND 2 Cho, H., Kapur, P., Kalavade, P., Saraswat, K. C. 2007: 917-920
  • Interface-engineered Ge (100) and (111), N- and P-FETs with high mobility 2007 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, VOLS 1 AND 2 Kuzum, D., Pethe, A. J., Krishnamohan, T., Oshima, Y., Sun, Y., McVittie, J. P., Pianetta, P. A., McIntyre, P. C., Saraswat, K. C. 2007: 723-726
  • Optical link on silicon employing Ge/SiGe quantum well structures 2007 IEEE LEOS ANNUAL MEETING CONFERENCE PROCEEDINGS, VOLS 1 AND 2 Fidaner, O., Okyay, A. K., Roth, J. E., Scheavitz, R. K., Kuo, Y., Saraswat, K. C., Harris, J. S., Miller, D. A. 2007: 852-853
  • Novel Si-based Optoelectronic Switching Device: Light to Latch 2007 CONFERENCE ON LASERS & ELECTRO-OPTICS/QUANTUM ELECTRONICS AND LASER SCIENCE CONFERENCE (CLEO/QELS 2007), VOLS 1-5 Okyay, A. K., Pethe, A. J., Kuzum, D., Latif, S., Miller, D. A., Saraswat, K. C. 2007: 183-184
  • Modeling of the Performance of Carbon Nanotube Bundle, Cu/Low-K and Optical On-chip Global Interconnects PROCEEDINGS OF SLIP '07: 2007 INTERNATIONAL WORKSHOP ON SYSTEM LEVEL INTERCONNECT PREDICTION Cho, H., Koo, K., Kapur, P., Saraswat, K. C. 2007: 81-88
  • High performance, strained-Ge, heterostructure pMOSFETs SISPAD 2007: SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES 2007 Krishnamohan, T., Kim, D., Jungemann, C., Pham, A., Meinerzhagen, B., Nishi, Y., Saraswat, K. C. 2007: 21-24
  • Fluorine incorporation at HfO2 /SiO2 interfaces in high-k metal-oxide-semiconductor gate stacks: Local electronic structure Appl. Phys. Lett. Ha, J., Seo, K., McIntyre, P., C., Saraswat, K., C., Cho, K. 2007; 90: 112911
  • Performance Comparisons Between Cu/Low-K Carbon-Nanotube, and Optics for Future On-Chip Interconnects IEEE Trans. Electron Dev. Koo, K., Cho, H., Kapur, P., Saraswat, Krishna, C. 2007; 54 (12): 3206-3215
  • Near-Infrared Photodetector Enhanced by an Open-Sleeve Dipole Antenna IPNRA 2007 Tang, L., Kocabas, E., Latif, S., Okyay, A., K., Ly-Gagnon, D., Saraswat, K., C. 2007
  • Retention Improvement in fluorinated-HfO2/SiO2 Tunnel Stack for Non-Volatile Flash Memory IEEE SISC Verma, S., Pop, E., Kapur, P., Majhi, P., Parat, K., Saraswat, K., C. 2007
  • Waveguide Electroabsorption Modulator on Si Employing Ge/SiGe Quantum Wells OSA FiO 2007 Fidaner, O., Okyay, A., K., Roth, J., E., Kuo, Y., H., Saraswat, K., C., Harris, J., S. 2007
  • Ge/SiGe Quantum Well Waveguide Photodetectors on Silicon for the Near-Infrared IEEE Photon. Technol. Lett. Fidaner, O., Okyay, A., K., Roth, J., E., Schaevitz, R., K., Kuo, Y., H., Saraswat, K., C. 2007; 19 (20): 1631-1633
  • CMOS Compatible Silicon-Germanium Optoelectronic Switching Device: Bringing Light to Latch IEEE Trans. Electron Dev. Okyay, Ali, K., Kuzum, D., Latif, S., Miller, D., A., Saraswat, K., C. 2007; 54 (12): 3252-3259
  • Metal-Semiconductor-Metal (MSM) Photodetectors Based on Single-walled Carbon Nanotube Film-GaAs Schottky Contacts MRS, Fall Meeting Johnson, J., L., Behnam, A., Choi, Y., Noriega, L., Ertosun, G., Wu, Z., Saraswat, K. 2007
  • A Modulator Design Methodology Minimizing Power Dissipation in a Quantum Well Modulator-Based Optical Interconnect IEEE J. Lightwave Technology Cho, H., Kapur, P., Saraswat, K., C. 2007; 25 (6): 1621 - 1628
  • Electrical and Physical Characterization of ALD-Grown HfO2 Gate Dielectrics on GaAs (100) Substates with Sulfur Passivation Spring MRS Meeting Kim, E., Chen, J., Choi, D., Goel, N., Chui, C., O., Tsai, W., Saraswat, K. 2007
  • Chemical states and electrical properties of a high-k metal oxide/silicon interface with oxygen-gettering titanium-metal-overlayer APPLIED PHYSICS LETTERS Seo, K., Lee, D., Pianetta, P., Kim, H., Saraswat, K. C., McIntyre, P. C. 2006; 89 (14)

    View details for DOI 10.1063/1.2358834

    View details for Web of Science ID 000241056900088

  • Improvement in high-k (HfO2/SiO2) reliability by incorporation of fluorine IEEE ELECTRON DEVICE LETTERS Seo, K., Sreenivasan, R., McIntyre, P. C., Saraswat, K. C. 2006; 27 (10): 821-823
  • Effect of impurities on the fixed charge of nanoscale HfO2 films grown by atomic layer deposition APPLIED PHYSICS LETTERS Sreenivasan, R., McIntyre, P. C., Kim, H., Saraswat, K. C. 2006; 89 (11)

    View details for DOI 10.1063/1.2348735

    View details for Web of Science ID 000240545400096

  • High-efficiency metal-semiconductor-metal photodetectors on heteroepitaxially grown Ge on Si OPTICS LETTERS Okyay, A. K., Nayfeh, A. M., Saraswat, K. C., Yonehara, T., Marshall, A., McIntyre, P. C. 2006; 31 (17): 2565-2567

    Abstract

    We demonstrate extremely efficient germanium-on-silicon metal-semiconductor-metal photodetectors with responsivities (R) as high as 0.85 A/W at 1.55 microm and 2V reverse bias. Ge was directly grown on Si by using a novel heteroepitaxial growth technique, which uses multisteps of growth and hydrogen annealing to reduce surface roughness and threading dislocations that form due to the 4.2% lattice mismatch. Photodiodes on such layers exhibit reverse dark currents of 100 mA/cm2 and external quantum efficiency up to 68%. This technology is promising to realize monolithically integrated optoelectronics.

    View details for Web of Science ID 000240008700017

    View details for PubMedID 16902620

  • A novel spacer process for sub-10-nm-thick vertical MOS and its integration with planar MOS device IEEE TRANSACTIONS ON NANOTECHNOLOGY Cho, H., Kapur, P., Kalavade, P., Saraswat, K. C. 2006; 5 (5): 554-563
  • Nanoscale germanium MOS dielectrics - Part II: High-kappa gate dielectrics IEEE TRANSACTIONS ON ELECTRON DEVICES Chui, C. O., Kim, H., Chi, D., McIntyre, P. C., Saraswat, K. C. 2006; 53 (7): 1509-1516
  • Nanoscale germanium MOS dielectrics - Part I: Germanium oxynitrides IEEE TRANSACTIONS ON ELECTRON DEVICES Chui, C. O., Ito, F., Saraswat, K. C. 2006; 53 (7): 1501-1508
  • C-shaped nanoaperture-enhanced germanium photodetector OPTICS LETTERS Tang, L., Miller, D. A., Okyay, A. K., Matteo, J. A., Yuen, Y., Saraswat, K. C., Hesselink, L. 2006; 31 (10): 1519-1521

    Abstract

    We present a C-shaped nanoaperture-enhanced Ge photodetector that shows 2-5 times the photocurrent enhancement over that from a square aperture of the same area at 1310 nm wavelength. We demonstrate the polarization dependence of the C-aperture photodetector over a wide wavelength range. Our experimental observation agrees well with finite-difference time-domain simulation results.

    View details for Web of Science ID 000237431600052

    View details for PubMedID 16642158

  • High-mobility ultrathin strained Ge MOSFETs on bulk and SOI with low band-to-band tunneling leakage: Experiments IEEE TRANSACTIONS ON ELECTRON DEVICES Krishnamohan, T., Krivokapic, Z., Uchida, K., Nishi, Y., Saraswat, K. C. 2006; 53 (5): 990-999
  • High-mobility low band-to-band-tunneling strained-germanium double-gate heterostructure FETs: Simulations IEEE TRANSACTIONS ON ELECTRON DEVICES Krishnamohan, T., Kim, D., Nguyen, C. D., Jungemann, C., Nishi, Y., Saraswat, K. C. 2006; 53 (5): 1000-1009
  • Leakage suppression by asymmetric area electrodes in metal-semiconductor-metal photodetectors APPLIED PHYSICS LETTERS Okyay, A. K., Chui, C. O., Saraswat, K. C. 2006; 88 (6)

    View details for DOI 10.1063/1.2171648

    View details for Web of Science ID 000235252800109

  • High mobility materials and novel device structures for high performance nanoscale MOSFETs 2006 INTERNATIONAL ELECTRON DEVICES MEETING, VOLS 1 AND 2 Saraswat, K. C., Chui, C. O., Kim, D., Krishnamohan, T., Pethe, A. 2006: 395-398
  • Theoretical investigation of performance in uniaxially- and biaxially-strained Si, SiGe and Ge double-gate p-MOSFETs 2006 INTERNATIONAL ELECTRON DEVICES MEETING, VOLS 1 AND 2 Krishnamohan, T., Jungernann, C., Kim, D., Ungersboeck, E., Selberherr, S., Wong, P., Nishi, Y., Saraswat, K. 2006: 681-684
  • Investigation of the performance limits of III-V double-gate n-MOSFETs SIXTEENTH BIENNIAL UNIVERSITY/GOVERNMENT/INDUSTRY MICROELECTRONICS SYMPOSIUM, PROCEEDINGS Pethe, A., Krishnamohan, T., Kim, D., Oh, S., Wong, H. P., Saraswat, K. 2006: 47-50
  • Performance comparison between vertical-cavity surface-emitting laser and quantum-well modulator for short-distance optical links IEEE PHOTONICS TECHNOLOGY LETTERS Cho, H., Kapur, P., Saraswat, K. C. 2006; 18 (1-4): 520-522
  • Strain enhanced high efficiency germanium photodetectors in the near infrared for integration with Si 2006 IEEE LEOS ANNUAL MEETING CONFERENCE PROCEEDINGS, VOLS 1 AND 2 Okyay, A. K., Nayfeh, A. M., Saraswat, K. C., Ozguven, N., Marshall, A., McIntyre, P. C., Yonehara, T. 2006: 460-461
  • A Novel Spacer Process for Sub 25nm thick Vertical MOS and its Integration with Planar MOS Device IEEE Trans. Nanotech. Cho, H., Kapur, P., Kalavade, P., Saraswat, K., C. 2006; 5 (5): 554-563
  • Power/Performance Based Scalability Comparisons between Conventional and Novel Transistors Down to 32nm Technology Node IEEE SISPAD Kapur, P., Saraswat, K., C. 2006: 290-293
  • Band to Band Tunneling limited Off state Current in Ultra-thin Body Double Gate FETs with High Mobility Materials : III-V, Ge and strained Si/Ge IEEE SISPAD Kim, D., Krishnamohan, T., Nishi, Y., Saraswat, K., C. 2006: 389-382
  • Ge on Si by Novel Heteroepitaxy for High Efficiency Near Infrared Photodetection CLEO 2006 Okyay, Ali, K., Nayfeh, A., M., Saraswat, K., C., Marshall, A., McIntyre, Paul, C. 2006
  • Geometry dependence of Poly-Si Oxidation and Its Application to Self-align, Maskless Process for Nano-scale Vertical CMOS Structures 210th Electrochem. Soc. Meet. Cho, H., Kapur, P., Kalavade, P., Saraswat, K., C. 2006
  • Improvement in High-k (HfO2/SiO2) Reliability by Incorporation of Fluorine IEEE Electron Dev. Lett. Seo, K. 2006; 27 (10): 821
  • An Overview of Advanced Interconnect Solutions 1st Int. Workshop on Interconnect Design and Variability Saraswat, K., C. 2006
  • High Mobility, Ultra Thin (UT), Strained Ge MOSFETs On Bulk and SOI With Low Band To Band Tunneling (BTBT) Leakage : Experiments IEEE Trans. Electron Dev. Krishnamohan, T., Krivokapic, Z., Uchida, K., Nish, Y., Saraswat, K., C. 2006; 53 (5): 990-999
  • High Efficiency MSM Photodetectors on Heteroepitaxially Grown Ge on Si Optics Letters Okyay, Ali, K., Nayfeh, A., M., Yonehara, T., Marshall, A., McIntyre, P., C., Saraswat, K., C. 2006; 31 (17): 2565-2567
  • Interface state Density measurement at GeOxNy-Ge interface for Ge MIS Application IEEE SISC Pethe, A., Saraswat, K., C. 2006
  • Performance Limitations of Si CMOS and Alternatives for Nanoelectronics Int. J. High Speed Electronics and Systems Saraswat, K., C., Chui, C., O., Kapur, P., Krishnamohan, T., Nayfeh, A., Okyay, Ali, K. 2006; 16 (1): 175 – 192
  • Collaborative Research Centers in USA in Electronics Birla Institut of Technology & Science, Bangalore Campus Saraswat, K., C. 2006
  • Physics and Technology of High Performance, Strained Germanium Channel, Heterostructure MOSFETs IEEE Int. Workshop on Nano CMOS Saraswat, K., C., Krishnamohan, T. 2006
  • High Mobility, Low Band To Band Tunneling (BTBT), Strained Germanium, Double Gate (DG), Heterostructure FETs : Simulations IEEE Trans. Electron Dev. Krishnamohan, T., Kim, D., Nguyen, C., Jungemann, C., Nish, Y., Saraswat, K., C. 2006; 53 (5): 1000-1009
  • Comparative study on electrical and microstructural characteristics of ZrO2 and HfO2 grown by atomic layer deposition JOURNAL OF MATERIALS RESEARCH Kim, H., Saraswat, K. C., McIntyre, P. C. 2005; 20 (11): 3125-3132
  • Germanium n-type shallow junction activation dependences APPLIED PHYSICS LETTERS Chui, C. O., Kulig, L., Moran, J., Tsai, W., Saraswat, K. C. 2005; 87 (9)

    View details for DOI 10.1063/1.2037861

    View details for Web of Science ID 000231503700027

  • Minimizing power dissipation in optical interconnects at low voltage using optimal modulator design IEEE TRANSACTIONS ON ELECTRON DEVICES Kapur, P., Kekatpure, R. D., Saraswat, K. C. 2005; 52 (8): 1713-1721
  • Chemical states and electronic structure of a HfO2/Ge(001) interface APPLIED PHYSICS LETTERS Seo, K. I., McIntyre, P. C., Sun, S., Lee, D. I., Pianetta, P., Saraswat, K. C. 2005; 87 (4)

    View details for DOI 10.1063/1.2006211

    View details for Web of Science ID 000230725900045

  • Zirconia-germanium interface photoemission spectroscopy using synchrotron radiation JOURNAL OF APPLIED PHYSICS Chui, C. O., Lee, D. I., Singh, A. A., Pianetta, P. A., Saraswat, K. C. 2005; 97 (11)

    View details for DOI 10.1063/1.1922090

    View details for Web of Science ID 000229804700034

  • Fabrication of high-quality p-MOSFET in Ge grown heteroepitaxially on Si IEEE ELECTRON DEVICE LETTERS Nayfeh, A., Chui, C. O., Yonehara, T., Saraswat, K. C. 2005; 26 (5): 311-313
  • Formation of an interfacial Zr-silicate layer between ZrO2 and Si through in situ vacuum annealing APPLIED PHYSICS LETTERS Seo, K. I., McIntyre, P. C., Kim, H., Saraswat, K. C. 2005; 86 (8)

    View details for DOI 10.1063/1.1866644

    View details for Web of Science ID 000227609000054

  • Advanced germanium MOS devices and technology 2005 IEEE CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS, PROCEEDINGS Chui, C. O., Saraswat, K. C. 2005: 101-106
  • Physical mechanisms of electron mobility enhancement in uniaxial stressed MOSFETs and impact of uniaxial stress engineering in ballistic regime IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2005, TECHNICAL DIGEST Uchida, K., Krishnamohan, T., Saraswat, K. C., Nishi, Y. 2005: 135-138
  • 1A Novel Spacer Process for Sub 25nm thick Vertical MOS and its Integration with Planar MOS Device 2005 Silicon Nanoelectronics Workshop Cho, H., Kapur, P., Kalavadeand, P., Saraswat, K., C. 2005
  • Study of germanium surface in wet chemical solutions for surface cleaning applications ECS Transactions Kim, J., Saraswat, K., Nishi, Y. 2005; 1 (3): 214-219
  • Gate Dielectrics for Ge MOS Technology 208th Meeting of The Electrochem. Soc. Saraswat, K., C., Nayfeh, A., Chui, C., O. 2005
  • Innovative Device Structures And New Materials For Nanoelectronics IWPSD Saraswat, K., C., Chui, C., O., Krishnamohan, T., Nayfeh, A. 2005
  • Interfacial characteristics of HfO2 grown on nitrided Ge (100) substrates by atomic-layer deposition APPLIED PHYSICS LETTERS Kim, H., McIntyre, P. C., Chui, C. O., Saraswat, K. C., Cho, M. H. 2004; 85 (14): 2902-2904

    View details for DOI 10.1063/1.1797564

    View details for Web of Science ID 000224547300076

  • Effects of hydrogen annealing on heteroepitaxial-Ge layers on Si: Surface roughness and electrical quality APPLIED PHYSICS LETTERS Nayfeh, A., Chui, C. O., Saraswat, K. C., Yonehara, T. 2004; 85 (14): 2815-2817

    View details for DOI 10.1063/1.1802381

    View details for Web of Science ID 000224547300047

  • Engineering chemically abrupt high-k metal oxide/silicon interfaces using an oxygen-gettering metal overlayer JOURNAL OF APPLIED PHYSICS Kim, H., McIntyre, P. C., Chui, C. O., Saraswat, K. C., Stemmer, S. 2004; 96 (6): 3467-3472

    View details for DOI 10.1063/1.1776636

    View details for Web of Science ID 000223720000069

  • Scalability and electrical properties of germanium oxynitride MOS dielectrics IEEE ELECTRON DEVICE LETTERS Chui, C. O., Ito, F., Saraswat, K. C. 2004; 25 (9): 613-615
  • Power comparison between high-speed electrical and optical interconnects for interchip communication JOURNAL OF LIGHTWAVE TECHNOLOGY Cho, H., Kapur, P., Saraswat, K. C. 2004; 22 (9): 2021-2033
  • Integration of optical polymer pillars chip I/O interconnections with Si MSM photodetectors IEEE TRANSACTIONS ON ELECTRON DEVICES Bakir, M. S., Chui, C. O., Okyay, A. K., Saraswat, K. C., Meindl, J. D. 2004; 51 (7): 1084-1090
  • Zirconia grown by ultraviolet ozone oxidation on germanium(100) substrates JOURNAL OF APPLIED PHYSICS Chi, D., Chui, C. O., Saraswat, K. C., Triplett, B. B., McIntyre, P. C. 2004; 96 (1): 813-819

    View details for DOI 10.1063/1.1745118

    View details for Web of Science ID 000222093300129

  • Atomic layer deposition of high-kappa dielectric for germanium MOS applications-substrate surface preparation IEEE ELECTRON DEVICE LETTERS Chui, C. O., Kim, H., McIntyre, P. C., Saraswat, K. C. 2004; 25 (5): 274-276
  • Crystallization kinetics and microstructure-dependent leakage current behavior of ultrathin HfO2 dielectrics: In situ annealing studies APPLIED PHYSICS LETTERS Kim, H., Marshall, A., McIntyre, P. C., Saraswat, K. C. 2004; 84 (12): 2064-2066

    View details for DOI 10.1063/1.1667621

    View details for Web of Science ID 000220268500018

  • Microstructural evolution of ZrO2-HfO2 nanolaminate structures grown by atomic layer deposition JOURNAL OF MATERIALS RESEARCH Kim, H. S., McIntyre, P. C., Saraswat, K. C. 2004; 19 (2): 643-650
  • Very high performance, sub-20nm, strained Si and SixGe1-x hetero-structure, center channel (CC) NMOS and PMOS DGFETs SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES 2004 Krishnamohan, T., Jungemann, C., Saraswat, K. C. 2004: 191-194
  • Engineering Chemically Abrupt High-k/Silicon Interfaces Using Oxygen-Gettering Metal Overlayers presented at WODIM 2004 Kim, H., McIntyre, P., C., Chui, C., O., Saraswat, K., C., Stemmer, S. 2004
  • Analytical Modeling of Ge and Si Double-Gate(DG) NFETs and the Effect of Process Induced Variations (PIV) on Device Performance IEEE SISPAD Pethe, A., Krishnamohan, T., Uchida, K., Saraswat, K., C. 2004
  • Novel Deposition Processes for High-k/Ge Devices: Interface Engineering to be presented in MRS 2004 Spring Meeting, Symposium on Joint Session: High-k and High Mobility Substrates, Paper B5.1/D5.1, San Francisco, CA McIntyre, P., Kim, H., Chi, D., Chui, C., O., Triplett, B., Javey, A., Saraswat, K. 2004
  • Self-consistent Power/Performance/Reliability Analysis for Copper Interconnects presented in SLIP 2004 Rajendran, B., Kapur, P., Saraswat, K., C., Pease, R., F. W. 2004
  • Power Optimization of Future Transistors and a Resulting Global Comparison Standard IEEE IEDM Kapur, P., Shenoy, R., S., Chao, A., K., Nishi, Y., Saraswat, K., C. 2004
  • Effects of Hydrogen Annealing on Heteroepitaxial-Ge layers on Si : Surface Roughness and Electrical Quality 206th meet. Electrochem. Soc. Nayfeh, A., Chui, C., O., Saraswat, K., C., Yonehara, T. 2004
  • Performance Limitations of Devices and Interconnects and Possible Alternatives for Nanoelectronics IEEE Advanced Workshop on 'Frontiers in Electronics' WOFE 2004 Saraswat, K., C., Chui, C., O., Krishnamohan, T., Nayfeh, A., Shenoy, R. 2004
  • Low Thermal Budget Ge MOS Technology 205th Meeting of The Electrochem. Soc. Chui, C., O., Saraswat, K., C. 2004
  • Effective dark current suppression with asymmetric MSM photodetectors in Group IV semiconductors IEEE PHOTONICS TECHNOLOGY LETTERS Chui, C. O., Okyay, A. K., Saraswat, K. C. 2003; 15 (11): 1585-1587
  • Activation and diffusion studies of ion-implanted p and n dopants in germanium APPLIED PHYSICS LETTERS Chui, C. O., Gopalakrishnan, K., Griffin, P. B., Plummer, J. D., Saraswat, K. C. 2003; 83 (16): 3275-3277

    View details for DOI 10.1063/1.1618382

    View details for Web of Science ID 000185954400015

  • Local epitaxial growth of ZrO2 on Ge(100) substrates by atomic layer epitaxy APPLIED PHYSICS LETTERS Kim, H., Chui, C. O., Saraswat, K. C., McIntyre, P. C. 2003; 83 (13): 2647-2649

    View details for DOI 10.1063/1.1613031

    View details for Web of Science ID 000185521400049

  • Germanium nanowire field-effect transistors with SiO2 and high-kappa HfO2 gate dielectrics APPLIED PHYSICS LETTERS Wang, D. W., Wang, Q., Javey, A., Tu, R., Dai, H. J., Kim, H., McIntyre, P. C., Krishnamohan, T., Saraswat, K. C. 2003; 83 (12): 2432-2434

    View details for DOI 10.1063/1.1611644

    View details for Web of Science ID 000185333200044

  • High performance submicrometer CMOS with metal induced lateral crystallization of amorphous silicon JOURNAL OF THE ELECTROCHEMICAL SOCIETY Joshi, A. R., Saraswat, K. C. 2003; 150 (8): G443-G449

    View details for DOI 10.1149/1.1586302

    View details for Web of Science ID 000184205300053

  • Atomic layer deposition of ZrO2 on W for metal-insulator-metal capacitor application APPLIED PHYSICS LETTERS Lee, S. Y., Kim, H., McIntyre, P. C., Saraswat, K. C., Byun, J. S. 2003; 82 (17): 2874-2876

    View details for DOI 10.1063/1.1569985

    View details for Web of Science ID 000182399700043

  • Effects of crystallization on the electrical properties of ultrathin HfO2 dielectrics grown by atomic layer deposition APPLIED PHYSICS LETTERS Kim, H., McIntyre, P. C., Saraswat, K. C. 2003; 82 (1): 106-108

    View details for DOI 10.1063/1.1533117

    View details for Web of Science ID 000180134100036

  • A novel, very high performance, sub-20nm depletion-mode double-gate (DMDG) Si/SixGe(1-x)/Si channel PMOSFET 2003 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST Krishnamohan, T., Jungemann, C., Saraswat, K. C. 2003: 687-690
  • Minimizing power dissipation in chip to chip optical interconnects using optimal modulators and laser power PROCEEDINGS OF THE IEEE 2003 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE Kapur, P., Saraswat, K. C. 2003: 224-226
  • A model for crystal growth during metal induced lateral crystallization of amorphous silicon JOURNAL OF APPLIED PHYSICS Joshi, A. R., Krishnamohan, T., Saraswat, K. C. 2003; 93 (1): 175-181

    View details for DOI 10.1063/1.1526937

    View details for Web of Science ID 000180002500029

  • Crystallization of HfO2 Synthesized by Atomic Layer Deposition: Electrical and Microstructural Behavior ECS Fall Meeting Kim, H., McIntyre, P., C., Saraswat, K., C. 2003
  • A Germanium NMOSFET Process Integrating Metal Gate and Improved Hi-k Dielectrics IEEE International Electron Devices Meeting (IEDM) 2003 Technical Digest Chui, C., O., Kim, H., McIntyre, P., C., Saraswat, K., C. 2003: 437-440
  • Nickel induced crystallization of a-Si gate electrode at 500C and MOS capacitor reliability IEEE Trans. Electron Dev. Joshi, Amol, R., Saraswat, K., C. 2003; 50 (4): 1058 -1062
  • Asymmetric Group IV MSM Photodetectors with Reduced Dark Currents CLEO Okyay, Ali, K., Chui, C. O., Saraswat, Krishna, C. 2003
  • Novel Germanium Technology and Devices for High Performance MOSFETs and Integrated On-chip Optical Clocking 203rd Meeting of the Electrochem. Soc. Saraswat, K., C., Chui, C., O., McIntyre, P., C., Triplett, B., B. 2003
  • Performance Limitations of Metal Interconnects and Possible Alternatives 203rd Meeting of the Electrochem. Soc. Saraswat, K., C., Kapur, P., Souri, S. 2003
  • A novel sub-20nm Depletion-Mode Double-Gate (DMDG) FET IEEE SISPAD Krishnamohan, T., Krivokapic, Z., Saraswat, K., C. 2003
  • Technology and reliability constrained future copper interconnects - Part I: Resistance modeling IEEE TRANSACTIONS ON ELECTRON DEVICES Kapur, P., McVittie, J. P., Saraswat, K. C. 2002; 49 (4): 590-597
  • Technology and reliability constrained future copper interconnects - Part II: Performance implications IEEE TRANSACTIONS ON ELECTRON DEVICES Kapur, P., Chandra, G., McVittie, J. P., Saraswat, K. C. 2002; 49 (4): 598-604
  • Power dissipation in optical clock distribution network for high performance ICs PROCEEDINGS OF THE IEEE 2002 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE Kapur, P., Saraswat, K. C. 2002: 151-153
  • Impact of joule heating on scaling of deep sub-micron Cu/low-k interconnects 2002 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS Chiang, T. Y., Shieh, B., Saraswat, K. C. 2002: 38-39
  • Comparisons between electrical and optical interconnects for on-chip signaling PROCEEDINGS OF THE IEEE 2002 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE Kapur, P., Saraswat, K. C. 2002: 89-91
  • Power estimation in global interconnects and its reduction using a novel repeater optimization methodology 39TH DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2002 Kapur, P., Chandra, G., Saraswat, K. C. 2002: 461-466
  • Materials and Electrical Properties of ZrO2, HfO2 and Nano-laminate Gate Dielectrics Grown by ALD MRS Fall Meeting Kim, H., McIntyre, P., C., Saraswat, K., C. 2002
  • Germanium MOS Capacitors Incorporating Ultrathin High-k Gate Dielectric IEEE Electron Dev. Lett. Chui, C. O., Ramanathan, S., Triplett, B., B., McIntyre, P., C., Saraswat, K., C. 2002; EDL-23: 473-475
  • Single-crystalline Si on insulator in confined structures fabricated by two-step metal-induced crystallization of amorphous Si Appl. Phys. Lett. Liu, Y., Deal, Michael, D., Saraswat, Krishna, C., Plummer, James, D. 2002; 81 (24)
  • Collaborative Research Centers in USA in Electronics Opening Ceremony of the National Nanotechnology Researchers Network Centers of Japan Saraswat, K., C. 2002
  • The Structural and Electrical Properties of Ultra-Thin HfO2 and Nanolaminates Synthesized by Atomic Layer Deposition IEEE Semiconductor Interface Specialists Conference (SISC) Kim, H., McIntyre, P., C., Saraswat, K., C. 2002
  • A Sub-400'C Germanium MOSFET Technology with High-k Dielectric and Metal Gate IEEE Int. Electron Dev. Meet. Chui, C. O., Kim, H., S., Chi, D., Triplett, B., B., McIntyre, P., C., Saraswat, K., C. 2002
  • Scaling Induced Performance Limitations of Metal Interconnects IEEE ISSCC Microprocessor Design Workshop Saraswat, K., Kapur, P., Chandra, G., Chiang, T., Y., Souri, S. 2002
  • The Ultrathin-Body Vertical Replacement-Gate MOSFET: A Highly-Scalable, Fully-Depleted MOSFET with a Deposition-Defined Ultrathin (< 15 nm) Silicon Body 2002 IEEE Si Nanoelectronics Workshop Kalavade, P., Hergenrother, J., M., Sorsch, T., W., Aravamudhan, S., Bude, M., K., Ferry, E., J., Saraswat, K. 2002
  • Analytical Thermal Model for Multilevel VLSI Interconnects Incorporating Via Effect IEEE Electron Device Letters Chiang, T., Y., Banerjee, K., Saraswat, K., C. 2002; 23 (1): 31-33
  • Electrical and Materials Properties of ALD-Grown ZrO2 and HfO2 Gate Dielectrics MRS 2002 spring meeting Kim, H., S., McIntyre, P., C., Saraswat, K., C. 2002
  • Performance Limitations of Metal Interconnects and Possible Alternatives Presented at the SEMICON Kapur, P., Chandra, G., Saraswat, K., C. 2002
  • Impact of vias on the thermal effect of deep sub-micron Cu/low-k interconnects 2001 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS Chiang, T. Y., Saraswat, K. C. 2001: 141-142
  • Compact modeling and SPICE-based simulation for electrothermal analysis of multilevel ULSI interconnects ICCAD 2001: IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN, DIGEST OF TECHNICAL PAPERS Chiang, T. Y., Banerjee, K., Saraswat, K. C. 2001: 165-172
  • Electrical and Material Properties of ZrO2 Gate Dielectrics by Atomic Layer Chemical Vapor Deposition Applied Physics Letters. Perkins, C., M., Triplett, B., B., McIntyre, P., C., Saraswat, K., Haukka, S., Tuominen, M. 2001
  • Modeling and Simulation of Feature-Size-Dependent Etching of Metal Stacks JVST B Abdollahi-Alibeik, S., Zheng, J., Gabriel, C., T., McVittie, J., P., Saraswa, K., C., Abraham, S. 2001
  • 3-D Heterogeneous ICs: A Technology for the Next Decade and Beyond 5th IEEE Workshop on Signal Propagation on Interconnects Banerjee, K., Souri, S., J., Kapur, P., Saraswat, K., C. 2001
  • Reliability studies on Multilevel Interconnection with Intermetal Dielectric Airgaps Microelectronics Reliability Sukharev, V., Shieh, B., P., Choudhury, R., Park, C., Saraswat, K., C. 2001; 41: 1631-1635
  • Thermal Analysis of Heterogeneous 3-D ICs with Various Integration Scenarios EEE Int. Electron Dev. Meet. Chiang, T., Y., Souri, S., J., Chui, C. O., Saraswat, K., C. 2001: 681-684
  • Very High Performance 40nm CMOS with Ultra-thin Nitride/Oxynitride Stack Gate Dielectric and Pre-doped Dual Poly-Si Gate Electrode IEEE Int. Electron Dev. Meet. Xiang, Q., Jeon, J., Sachdev, P., Yu, B., Saraswa, K., C., Lin, M. 2000: 860~861
  • Effect of Via Separation and Low-k Materials on the Thermal Characteristics of Cu Interconnects IEEE Int. Electron Dev. Meet. Chiang, T., Banerjee, K., Saraswat, K., C. 2000: 261~264
  • A strategy for modeling of variations due to grain size in polycrystalline thin film transistors IEEE Trans. Electron Dev. Wang, A., W., Saraswat, K., C. 2000; 47: 1035~1043
  • Effect of Physical Stress on the Degradation of Thin SiO2 Films Under Electrical Stress IEEE Trans. Electron Dev. Yang, T., C., Saraswat, K., C. 2000; 47 (4): 746~755
  • High performance 200nm single-grain TFTs fabricated using a self-aligned germanium seeding technology 2000 MRS Spring Meeting Kalavade, P., Joshi, A., R., Subramanian, V., Saraswat, K., C. 2000
  • 3-D ICs: Performance Analysis, and Technology 197th Meeting of the Electrochem. Soc. Saraswat, K., C., Banerjee, K., Joshi, A., R., Kalavade, P., Souri, S., J., Subramanian, V. 2000
  • Air gaps lower k of interconnect dielectrics SOLID STATE TECHNOLOGY Shieh, B., Saraswat, K., Deal, M., McVittie, J. 1999; 42 (2): 51-?
  • Sub-micron Thin Film Transistors with Metal Induced Lateral Crystallization 196th Meeting of the Electrochem. Soc. Joshi, Amol, R., Saraswat, K., C. 1999
  • Abatement of perfluorocarbons with an inductively coupled plasma reactor J. Vac. Sci. & Tech. B: Vacuum, Surfaces, and Films Liao, M., Y., Wong, K., McVittie, J., P., Saraswat, K., C. 1999; 17 (6): 2638~43
  • Analytical modeling of silicon etch process in high density plasma J. Vac. Sci. & Tech. A: Vacuum Abdollahi-Alibeik, S., McVittie, J., P., Saraswat, K, C., Sukharev, V., Schoenborn, P. 1999; 17 (5): 2485~2491
  • Low-leakage Germanium-seeded Laterally-crystallized Single-grain 100nm TFTs for Vertical Integration Applications IEEE Electron Dev. Lett. Subramanian, V., Toita, M., Ibrahim, N., R., Souri, S., J., Saraswat, K., C. 1999; 20 (7): 341~343
  • Influence of Process-Induced Stress on Device Characteristics and its Impact on Scaled Device Performance IEEE Trans. Electron Dev. Smeys, P., Griffin, P., B., Rek, Z., U., DeWolf, I., Saraswat, K., C. 1999; 46: 1245~1252
  • Rapid thermal anneal of gate oxides for low thermal budget TFTs IEEE Trans. Electron Dev. Bhat, N., Wang, A., Saraswat, K., C. 1999; 46: 63~69
  • Dependence of fermi level positions at gate and substrate on the reliability of ultrathin MOS gate oxides IEEE Trans. Electron Dev. Yang, T., C., Sachdev, P., Saraswat, K., C. 1999; 46 (7): 1457~1463
  • Method for angular sputter yield extraction for high-density plasma chemical vapor deposition simulators J. Vac. Sci. & Tech. B (Microelectronics and Nanometer Structures) AIP for American Vacuum Soc Kapur, P., Bang, D., McVittie, J., P., Saraswat, K., C., Mountsier, T. 1998; 16 (3): 1123~8
  • Optimization of Silicon-Germanium TFTs Through the Control of Amorphous Precursor Characteristics IEEE Trans. Electron Dev. Subramanian, V., Saraswat, K., C. 1998; 45: 1690~1695
  • Characterization of border trap generation in rapid thermally annealed oxides deposited using silane chemistry Journal of Applied Physics Bhat, N., Saraswat, K., C. 1998; 84 (5): 2722
  • Air-Gap Formation During ILD Deposition to Lower Interconnect Capacitance IEEE Electron Device Lett. Shieh, B., Saraswat, K., C., McVittie, J., P., List, S., Nag, S., Islamraja, M. 1998; 19 (1): 16~18
  • Modeling of grain size variation effects in polycrystalline thin film transistors Technical Digest of the IEEE International Electron Device Meeting Wang, Albert, W., Saraswat, Krishna, C. 1998: 277~280
  • High Performance Germanium-Seeded Laterally Crystallized TFTs for Vertical Device Integration IEEE Trans. Electron Dev. Subramanian, V., Saraswat, K., C. 1998; 45 (9): 1934~1939
  • Controlled 2-step Solid-Phase Crystallization for High Performance TFTs IEEE Electron Device Lett. Subramanian, V., Dankoski, P., Degertekin, F., L., Khuri-Yakub, B., T., Saraswat, K., C. 1997; 18 (8): 378~381
  • In-Situ Monitoring of Crystallinity and Temperature During Rapid Thermal Crystallization of Si on Glass/ Quartz Using an Acoustic Sensor J. Electrochem. Soc. Subramanian, V., Degertekin, F., L., Dankoski, P., Khuri-Yakub, B., T., Saraswat, K., C. 1997; 144 (6): 2216~2221
  • A low temperature polycrystalline Si TFT technology for large area AMLCD drivers MRS spring meeting Saraswat, K., C., Jurichich, S., Subramanian, V., Wang, A. 1997
  • Bias temperature instability in hydrogenated thin film transistors IEEE Trans. Electr. Dev. Bhat, N., Cao, M., Saraswat, K., C. 1997; 44: 1102~1108
  • Simulation of the effect of dielectric air gaps on interconnect reliability MRS spring meeting Bassman, L., C., Shieh, B., P., Kim, D., K., Vinci, R., P., Mcvittie, J., P., Saraswat, K., C. 1997
  • Prediction of Plasma Charging Induced Gate Oxide Damage by Plasma Charging Probe EEE Electron Dev. Lett. Ma, S., Mcvittie, J., P., Saraswat, K., C. 1997; 18: 468~470
  • Accelerated Breakdown in Thin Oxide Films due to Interfacial Stress and Carrier Depletion MRS 1996 spring meeting Subramanian, V., Bhat, N., Saraswat, K., C. 1996
  • Influence of post-oxidation cooling rate on residual stress and pn-junction leakage current in LOCOS isolation structures IEEE Trans. Electr. Dev. Smeys, P., Griffin, P., B., Saraswat, K., C. 1996; 43: 1989~1993
  • Charge Trap Generation in LPCVD Oxide Under High Field Stressing IEEE Trans. Electron Devices. Bhat, N., Apte, P., Saraswat, K., C. 1996; 43 (4): 554~560
  • Temperature Measurement in Rapid Thermal Processing Using the Acoustic Temperaturre Sensor IEEE Trans. Semicond. Manufacturing Lee, Y., J., Khuri-Yakub, B., T., Saraswat, K., C. 1996; 9 (1): 115~121
  • A High-Performance Polysilicon Thin-Film Transistor Using XeCl Excimer Laser Crystallization of Pre-Patterned Amorphous Si Films IEEE Trans. Electron Devices. Cao, M., Talwar, S., Kramer, K., J., Sigmon, T., W., Saraswat, K., C. 1996; 43 (4): 561~567
  • Manufacturing Cost of Active-Matrix Liquid-Crystal Displays as a Function of Plant Capacity IEEE Trans. on Semiconductor Manufacturing Jurichich, S., Wood, S., C., Saraswat, K., C. 1996; 9 (4): 562~572
  • The Influence of Oxidation Induced Stress on the Generation Current and its Impact on Scaled Device Performance IEEE Int. Electron Dev. Meet. Smeys, P., Griffin, P., B., Rek, Z., Wolf, I., Saraswat, K., C. 1996: 709~712
  • Optimization and Modeling of Silicon-Germainium Thin Film Transistors for AMLCD Applications using a Plackett-Burman Experimental Design IEEE Statistical Metrology Workshop Subramanian, V., Saraswat, K., Hovagimian, H., Mehlhaff, J. 1996
  • A Study of Growth Conditions on Ultrathin MOS Gate Oxide Reliability MRS 1996 spring meeting Yang, T., C., Saraswat, K., C. 1996
  • Rapid Thermal Anneal of Gate Oxide for low Thermal Budget TFTs SID 1996 spring meeting Bhat, N., Wang, A., Saraswat, K., C. 1996
  • Quasi-Three-Dimensional Modeling of Sub-Micron LOCOS Structures IEEE Trans. Semicond. Manufacturing Park, H., Smeys, P., Sahul, Z., H., Saraswat, K., C., Dutton, R., W., Hwang, H. 1995; 8 (4)
  • Three Dimensional PVD Virtual Reactor for VLSI Metalization IEDM Tech. Digest Bang, D., S., McVittie, J., P., Saraswat, K., C., Krivokapic, Z., Iacoponi, J., A., Gray, J. 1995: 97~100
  • Study on Hydrogenation of Polysilicon Thin Film Transistors by Ion Implantation IEEE Trans. Electron Devices. Cao, M., Zhao, T., Saraswat, K., C., Plummer, J., D. 1995; 42 (6): 1134~1140
  • Resistivity study of boron and phosphorous doped polycrystalline Si1-x Gex films Applied Physics Letters Bang, D., S., Cao, M., Wang, A., W., Saraswat, K., C., King, T, J. 1995; 2 (66): 195~197
  • Material properties of LPCVD silicon nitride for modeling and calibrating the simulation of advanced isolation structures J. Appl. Phys. Smeys, P., Griffin, P., B., Saraswat, K., C. 1995; 78: 2837
  • Effects of Wafer Temperature on Plasma Charging Induced Damage to MOS Gate Oxides IEEE Electron Device Lett. Ma, S., McVittie, J., P., Saraswat, K., C. 1995; 16 (12): 534~536
  • Low Pressure Chemical Vapor Deposition of Si1-x Gex Films on SiO2 Characterization and Modeling J. Electrochem. Soc. Cao, M., Wang, A., W., Saraswat, K., C. 1995; 142 (5): 1566~1572
  • Three Dimensional Simulation for Sputter Deposition Equipment and Processes in Simulation of Semiconductor Devices and Processes, Electrochemical. Soc. Bang, D., S., Krivokapic, Z., Hohmeyer, M., McVittie, J., P., Saraswat, K., C. 1995; 6: 166~169
  • Optimization of a Intermetal Dielectric Deposition Module Using Simulation J. Vac. Sci. & Technol. Li, J., McVittie, J., P., Ferziger, J., Saraswat, K., C., Dong, J. 1995; 4 (B 13): 1867~74
  • A Multipule Target Sputter System with Enhanced Wafer Uniformity, Lifetime Uniformity, and Wafer Scaleability IEDM Tech. Digest Bang, D., S., Saraswat, K., C., Krivokapic, Z., McVittie, J., P. 1994: 549~552
  • Correlation of trap-generation and charge-to-breakdown Qbd A Physical-damage Model of Dielectric Breakdown IEEE Trans. Electron Devices Apte, Pushkar, P., Saraswat, K., C. 1994; 41 (9): 1595~1602
  • Interface -state Generation in Deposited Oxides due to Bias Temperature Stress Extended abstracts, Spring 1994 Meeting of the. Electrochem Society Bhat, N., Saraswat, K., C. 1994: 179
  • Modeling of Ti Physical Vapor Deposition Systems Intnl. Mtg Numerical Modeling of Process and Device for Integrated Ckts: NUPAD-V Bang, D., S., McVittie, J., P., IslamRaja, M., M., Saraswat, K., C., Krivokapic, Z., Cheung, R. 1994: 41~44
  • Fabrication and Characterization of Polycrystalline Silicon-Germanium Thin-Film Transistors IEEE Transactions on Electron Devices King, T., J., Saraswat, K., C. 1994; 41 (9): 1581~1591
  • A Vertical Submicron Polysilicon Thin Film Transistors Using a Low Temperature Process IEEE Electron Device Lett. Cao, M., Zhao, T., Saraswat, K., C., Plummer, J., D. 1994; 15 (10): 415~417
  • Rapid Thermal Multiprocessing for Adaptable Manufacturing of ICs IEEE Trans. Semiconductor Manufacturing Saraswat, K., C., Khuri-Yakub, B., T., Apte, P., P., Booth, L., Chen, Y., H., Dankoski, P. 1994; 7 (2): 159~175
  • In-Situ Acoustic Temperature Tomography of Semiconductor Wafers Applied Physics Letters Degertekin, L., Pei, J., Khuri-Yakub, B., T., Saraswat, K., C. 1994; 11 (64): 1338~1340
  • Electrical Properties of Heavily Doped Polycrystalline Silicon-Germanium Films IEEE Transactions on Electron Devices King, T., J., McVittie, J., P., Saraswat, K., C., Pfiester, J., R. 1994; 41 (2): 228~232
  • Control of MMST RTP: Reproducability, Uniformity, and Integration Flexible Manufacturing IEEE Trans. Semiconductor Manufacturing Schaper, C., Moslehi, M., M., Saraswat, K., C., Kailath, T. 1994; 7 (2): 202~219
  • Adaptable IC Manufacturing Systems for the 21st Century E-MRS, 1993 Spring Meeting, Strasbourg, May 4-7, 1993. Published in Microelectronic Engineering Saraswat, K., C. 1994; 25: 131~137
  • 3D Modeling of Rapid Thermal Processors for Design Optimization of a New Flexible RTP System IEEE Int. Electron Dev. Meet. Chen, Y., Booth, L., Schaper, C., Khuri-Yakub, B., T., Saraswat, K., C. 1994: 545~548
  • Modeling, Identification, and Control of Rapid Thermal Processing J. Electrochem. Soc. Schaper, C., Moslehi, M., M., Saraswat, K., C., Kailath, T. 1994; 141 (11): 3200~3209
  • Deposition and Properties of Low-Pressure Chemical-Vapor Deposited Polycrystalline Silicon-Germanium Films J. Electrochem. Soc. King, T., J., Saraswat, K., C. 1994; 141 (8): 2235~2240
  • A Simple EEPROM Cell Using Polysilicon Thin Film Transistors IEEE Electron Device Lett. Cao, M., Zhao, T., Saraswat, K., C., Plummer, J., D. 1994; 15 (8): 304~306
  • Low-Thermal-Budget Polycrystalline Silicon-Germanium Thin-Film Transistors Fabricated by Rapid Thermal Annealing Japan Journal of Applied Physics Jurichich, S., King, T., J., Saraswat, K., C., Mehlhaff, J. 1994; 33 (8B)
  • A twin polysilicon TFT planar EEPROM cell 1994 Nonvolatile Semiconductor Memory Workshop Zhao, T., Cao, M., Plummer, J., D., Saraswat, K., C. 1994
  • Profile Modeling of Diamond CVD Extended Abstracts of Spr. Mtg. of the Electrochem. Soc. IslamRaja, M., M., Cappelli, M., A., McVittie, J., P., Saraswat, K., C. 1993
  • In-Situ Temperature Monitoring in RTP by Acoustical Techniques MRS Spring Meeting, San Francicco, MRS Vol. 303 - Rapid Thermal and Integrated Processing Degertekin, L., Pei, J., Lee, Y., J., Khuri-Yakub, B., T., Saraswat, K., C. 1993; 303
  • In-Situ Temperature Monitoring In RTP By Acoustical Techniques MRS Spring Meeting Degertekin, L., Pei, J., Lee, Y., J., Khuri-Yakub, B., T., Saraswat, K., C. 1993
  • Backscattering Deposition in Ar Sputtering of Oxide Appl. Phys. Lett. Chang, C., Y., McVittie, J., P., Saraswat, K., C. 1993; 16 (60): 2294~2296
  • SiO2degradation with charge injection polarity IEEE Electron Device Lett. Apte, Pushkar, P., Saraswat, K., C. 1993; 14 (11)
  • In-Situ Acoustic Thermometry Tomography Rapid Thermal Processing Semiconductor Wafers Digest of 1993 IEEE International Electron Device Meeting Lee, Y., J., Degertekin, F., L., Pei, J., Khuri-Yakub, B., T., Saraswat, K., C. 1993: 187~190
  • Constant Current Stress Breakdown in Ultrathin SiO2Films J. Electrochemical Society Apte, P., Kubota, T., Saraswat, K., C. 1993; 140 (3): 770~773
  • A novel floating gate spacer polysilicon TFT Digest of 1993 IEEE International Electron Device Meeting Zhao, T., Cao, M., Plummer, J., D., Saraswat, K., C. 1993: 393-396
  • Two Precursor Model for LPCVD of Silicon Dioxide from TEOS J. Vac. Sci. and Tech. B Islamraja, M., M., Chang, C., McVittie, J., P., Cappelli, M., A., Saraswat, K., C. 1993: 720~726
  • Rapid Thermal Processing Uniformity Using Multivariable Control of a Circularly Symmetric 3 Zone Lamp IEEE Trans. Semiconductor Manufacturing Apte, P., Saraswat, K., C. 1992; 5 (3): 180~188
  • Low-Temperature (<550∞C) Fabrication of Poly-Si TFTs for Large-Area LCDs IEEE Electron Device Letters King, T., J., Saraswat, K., C. 1992; 13 (6): 309~311
  • Performance Driven Scaling of BiCMOS Technology IEEE Transactions on Electron Device Raje, P., Saraswat, K., C., Cham, K. 1992; 39 (3): 685~694
  • Determination of the Densities of Gap States in Hydrogenated Polycrystalline Si and Si0.8Ge0.2 Films Applied Physics Letters Cao, M., King, T., J., Saraswat, K., C. 1992; 6 (61): 672~674
  • A 3-Dimensional Model for Low-Pressure Chemical-Vapor-Deposition Step in Trenches and circular Vias J. Appl. Phys. Islamraja, M., M., Cappelli, M., McVittie, J., P., Saraswat, K., C. 1992; 11 (70): 7137~7140
  • Measurement of Lateral Dopant Diffusion in Thin Silicide Layers IEEE Transactions on Electron Device Chu, C., L., Saraswat, K., C., Wong, S., S. 1992; 39 (10): 2333~2340
  • A New Methodology for Design of BiCMOS Gates and Comparison with CMOS IEEE Transactions on Electron Device Raje, P., Saraswat, K., C., Cham, K. 1992; 39 (2): 339~347
  • A Variable-Workfunction Polycrystalline-Si1-x Ge-x Gate Material for Submicron CMOS Technologies IEEE Electron Device Letters King, T., J., Pfiester, J., Saraswat, K., C. 1991; 12 (10): 533~535
  • A New Test Structure to Identify Step Coverage Mechanisms in CVD SiO2 Applied Physics Letters Cheng, L., Y., McVittie, J., P., Saraswat, K., C. 1991; 19 (58): 2147~2149
  • Merged BiCMOS Logic to Extend the CMOS/BiCMOS Performance Crossover Below 2.5V Supply IEEE J. Solid State Circuits Ritts, R., Raje, P., A., Plummer, J., D., Saraswat, K., C., Cham, K. 1991; 26 (11): 1606--1614
  • PMOS Transistors in LPCVD Polycrystalline Silicon-Germanium Films IEEE Electron Device Letters King, T., J., Pfiester, J., Saraswat, K., C. 1991; 12 (11): 584~586
  • Technology Limitations for N+/P+ Polycide Gate CMOS due to Lateral Dopant Diffusion in Silicides/Polysilicon Layers IEEE Electron Device Letters Chu, C., L., Chin, G., Saraswat, K., C., Wong, S., S., Dutton, R. 1991; 12 (12): 696~698
  • A Low Temperature (<550∞C) Germanium-Silicon MOS Thin Film Transistor Technology for Large Area Electronics IEEE International Electron Device Meeting King, T., J., Saraswat, K., C. 1991
  • Monte Carlo Low Presssure Deposition Profile Simulation J. Vacuum Science and Technology (A) Rey, J., C., Cheng, L., Y., McVittie, J., P., Saraswat, K., C. 1991; 3 (9): 1083~1087
  • Simulation of Reactive Ion Etching with Surface Re-emission Presented at the 180th meeting of The Electrochem. Soc. Singh, H., Shaqfeh, E., S. G., McVittie, J., P., Saraswat, K., C. 1991
  • NITRIDATION AND POSTNITRIDATION ANNEALS OF SIO2 FOR ULTRATHIN DIELECTRICS IEEE TRANSACTIONS ON ELECTRON DEVICES Wright, P. J., Kermani, A., Saraswat, K. C. 1990; 37 (8): 1836-1841
  • THICKNESS LIMITATIONS OF SIO2 GATE DIELECTRICS FOR MOS ULSI IEEE TRANSACTIONS ON ELECTRON DEVICES Wright, P. J., Saraswat, K. C. 1990; 37 (8): 1884-1892
  • Cost Performance Modeling of Semiconductor Fabs Extended Abstracts, SRC Techcon'90 Wood, S., Saraswat, K., C., Harrison, J., M. 1990: 309~312
  • SPEEDIE: A Profile Simulator for Etching and Deposition Extended Abstracts, SRC Techcon '90 McVittie, J., P., Rey, J., C., Cheng, L., Y., Bariya, A., Ravi, S., Saraswat, K., C. 1990: 16~19
  • Characterization of Lateral Dopant Diffusion in Silicides Technical Digest, IEEE International Electron Device Meeting Chu, C., L., Saraswat, K., C., Wong, S., S. 1990: 245~248
  • LPCVD Profile Simulations Using a Re-Emission Model Technical Digest, IEEE International Electron Device Meeting McVittie, J., P., Rey, J., C., Islamraja, M., M., Cheng, L., Y., Saraswat, K., C. 1990: 917~920
  • Characterization of Lateral Dopant Diffusion in Silicides Extended Abstracts, SRC Techcon'90 Chu, C., L., Saraswat, K., C., Wong, S., S. 1990: 455~458
  • Modeling and Simulation of Sloped Sidewall Formation with SPEEDIE Extended Abstracts of Fall 1990 Meeting of the Electrochemical Society Bariya, A., McVittie, J., P., Frank, C., W., Saraswat, K., C., Rey, J., C., Ravi, S. 1990
  • A Polycrystalline-Si1-x Ge_x Gated MOS Devices Technical Digest, IEEE International Electron Device Meeting King, T., J., Pfiester, J., Shott, J., D., McVittie, J., P., Saraswat, K., C. 1990: 253~256
  • Characterization of Reactively Sputtered WNx and of a W-WN Bilayer Structure Extended Abstracts of Fall 1990 Meeting of the Electrochemical Society Pass, C., J., Deal, M., D., Saraswat, K., C. 1990
  • Hot-Carrier-Degredation Characteristics for Fluorine-Incorporated nMOSFETs IEEE Transactions on Electron Devices Kasai, N., Wright, P., Saraswat, K., C. 1990; 37 (6): 1426~1431
  • photoacoustic Technique for Thin Film Thickness and Temperature Measurements in Semiconductor Processing Workshop on Tungsten and Other Advanced Metals for ULSI Applications VII Khuri-Yakub, B., T., Saraswat, K., C., Lee, Y., J., Bhardwaj, S. 1990
  • HOT-ELECTRON HARDENED SI-GATE MOSFET UTILIZING F-IMPLANTATION - COMMENT IEEE ELECTRON DEVICE LETTERS Wright, P. J., Saraswat, K. C. 1989; 10 (8): 397-397
  • HOT-ELECTRON IMMUNITY OF SIO2 DIELECTRICS WITH FLUORINE INCORPORATION IEEE ELECTRON DEVICE LETTERS Wright, P. J., Kasai, N., Inoue, S., Saraswat, K. C. 1989; 10 (8): 347-348
  • SATPOLY - A SELF-ALIGNED TUNGSTEN ON POLYSILICON PROCESS FOR CMOS VLSI APPLICATIONS IEEE TRANSACTIONS ON ELECTRON DEVICES Wong, M., Saraswat, K. C. 1989; 36 (7): 1355-1361
  • THE EFFECT OF FLUORINE IN SILICON DIOXIDE GATE DIELECTRICS IEEE TRANSACTIONS ON ELECTRON DEVICES Wright, P. J., Saraswat, K. C. 1989; 36 (5): 879-889
  • FUNDAMENTAL FACTORS GOVERNING IMPROVED PERFORMANCE OF AL-SI/TI MULTILAYER METALLIZATION FOR VERY LARGE-SCALE INTEGRATION JOURNAL OF VACUUM SCIENCE & TECHNOLOGY A Joshi, A., Hu, H. S., YANEY, D. L., Gardner, D., Saraswat, K. 1989; 7 (3): 1497-1503
  • Chinese Microelectronics FASAC Technical Assessment Report (TAR) 4060, Science Application International Corp. Saraswat, K., C., Spencer, W., J., Chen, J., Y., Chiang, A., Frieman, W., Kuh, E., S. 1989
  • Temperature Measurement of Silicon Wafers Using Photo-Acoustic Techniques Presented at the Sixteenth Review of the Progress in Quantitative NDE, Brunswick, Maine, July 31~August 5, 1989, Published in Review of Progress in Quantitative Nondestructive Evaluation (Plenum Press, New York, 1989) Lee, Y., J., Chou, C., H., Khuri-Yakub, B., T., Saraswat, K., C., Moslehi, M., M. 1989
  • A New BiCMOS/CMOS Gate Comparison Methodology and Supply Voltage Scaling Model IEEE International Electron Device Meeting Raje, P., Saraswat, K., C., Cham, K. 1989
  • DIRECT TUNGSTEN ON SILICON DIOXIDE FORMED BY RF PLASMA-ENHANCED CHEMICAL VAPOR-DEPOSITION IEEE ELECTRON DEVICE LETTERS Wong, M., Saraswat, K. C. 1988; 9 (11): 582-584
  • LINEARLY RAMPED TEMPERATURE TRANSIENT RAPID THERMAL-OXIDATION OF SILICON APPLIED PHYSICS LETTERS Moslehi, M. M., Kermani, A., Saraswat, K. C. 1988; 53 (12): 1104-1106
  • LOW-RESISTANCE SUBMICROMETER CONTACTS TO SILICON IEEE TRANSACTIONS ON ELECTRON DEVICES Wright, P. J., Loh, W. M., Saraswat, K. C. 1988; 35 (8): 1328-1333
  • SPECIFIC CONTACT RESISTIVITY MEASUREMENTS OF REACTIVE ION ETCHED CONTACTS JOURNAL OF VACUUM SCIENCE & TECHNOLOGY A SCHREYER, T. A., BARIYA, A. J., McVittie, J. P., Saraswat, K. C. 1988; 6 (3): 1402-1406
  • TWO-DIMENSIONAL THERMAL-OXIDATION OF SILICON .2. MODELING STRESS EFFECTS IN WET OXIDES IEEE TRANSACTIONS ON ELECTRON DEVICES Kao, D. B., McVittie, J. P., Nix, W. D., Saraswat, K. C. 1988; 35 (1): 25-37
  • Single Wafer In-situ Multiprocessing Semicon Japan Digest of Technical Papers Saraswat, K., C. 1988
  • Simulation and Measurement of Picosecond Step Responses in VLSI Interconnections Digest of IEEE International Electron Device Meeting Schreyer, T., A., Nishi, Y., Saraswat, K. 1988: 344~347
  • Single Wafer In-situ Multiprocessing SRC Techcon'88 Digest of Technical Papers Saraswat, K., C. 1988
  • Non-Selective RF Plasma Enhanced Chemical Vapor Deposition of Tungsten Workshop on Tungsten and other Refractory Metals for VLSI Applications Wong, M., Saraswat, K., C. 1988
  • Modeling of Dopant Diffusion and Redistribution in WSi2/Si Structures Workshop on Metals, Dielectrics, and Interfaces for VLSI Saraswat, K., C., Shone, F., C., Plummer, J., D. 1988
  • THE EFFECTS OF CHEMICAL OXIDE ON THE DEPOSITION OF TUNGSTEN BY THE SILICON REDUCTION OF TUNGSTEN HEXAFLUORIDE JOURNAL OF THE ELECTROCHEMICAL SOCIETY Wong, M., Kobayashi, N., Browning, R., Paine, D., Saraswat, K. C. 1987; 134 (9): 2339-2345
  • FORMATION OF MOS GATES BY RAPID THERMAL MICROWAVE REMOTE-PLASMA MULTIPROCESSING IEEE ELECTRON DEVICE LETTERS Moslehi, M. M., Saraswat, K. C. 1987; 8 (9): 421-424
  • INTERFACIAL AND BREAKDOWN CHARACTERISTICS OF MOS DEVICES WITH RAPIDLY GROWN ULTRATHIN SIO2 GATE INSULATORS IEEE TRANSACTIONS ON ELECTRON DEVICES Moslehi, M. M., SHATAS, S. C., Saraswat, K. C., Meindl, J. D. 1987; 34 (6): 1407-1410
  • TWO-DIMENSIONAL THERMAL-OXIDATION OF SILICON .1. EXPERIMENTS IEEE TRANSACTIONS ON ELECTRON DEVICES Kao, D. B., McVittie, J. P., Nix, W. D., Saraswat, K. C. 1987; 34 (5): 1008-1017
  • INTERCONNECTION AND ELECTROMIGRATION SCALING THEORY IEEE TRANSACTIONS ON ELECTRON DEVICES Gardner, D. S., Meindl, J. D., Saraswat, K. C. 1987; 34 (3): 633-643
  • MODELING AND MEASUREMENT OF CONTACT RESISTANCES IEEE TRANSACTIONS ON ELECTRON DEVICES Loh, W. M., SWIRHUN, S. E., SCHREYER, T. A., Swanson, R. M., Saraswat, K. C. 1987; 34 (3): 512-524
  • SPECIAL ISSUE ON INTERCONNECTIONS FOR CONTACTS FOR VLSI - FOREWORD IEEE TRANSACTIONS ON ELECTRON DEVICES Saraswat, K. C., Moriya, T. 1987; 34 (3): 501-502
  • The Effect of Fluorine on Gate Dielectric Properties Digest of IEEE Int. Electron Device Meeting Wright, P., Wong, M., Saraswat, K., C. 1987: 574~577
  • Specific Contact Resistivity of RIE Etched Contacts J. Vac. Sci. Tech. Schreyer, T., A., Bariya, A., McVittie, J., P., Saraswat, K. 1987; 3 (A6): 1402~1406
  • A TWO-DIMENSIONAL ANALYTICAL MODEL OF THE CROSS-BRIDGE KELVIN RESISTOR IEEE ELECTRON DEVICE LETTERS SCHREYER, T. A., Saraswat, K. C. 1986; 7 (12): 661-663
  • THE SIDEWALL RESISTOR - A NOVEL TEST STRUCTURE TO RELIABLY EXTRACT SPECIFIC CONTACT RESISTIVITY IEEE ELECTRON DEVICE LETTERS Loh, W. M., Wright, P. J., SCHREYER, T. A., SWIRHUN, S. E., Saraswat, K. C., Meindl, J. D. 1986; 7 (8): 477-479
  • AN ACCURATE METHOD TO EXTRACT SPECIFIC CONTACT RESISTIVITY USING CROSS-BRIDGE KELVIN RESISTORS - REPLY IEEE ELECTRON DEVICE LETTERS SWIRHUN, S. E., Loh, W. M., Crabbe, E., Swanson, R. M., Saraswat, K. C. 1986; 7 (2): 142-144
  • Modeling Dopant Redistribution in SiO2/WSi2/Si Structure Digest of IEEE Int. Electron Device Meeting Shone, F., C., Hansen, S., E., Kao, D., B., Saraswat, K., C., Plummer, J., D. 1986: 534~537
  • Comparison of Test Structures used for the Measurement of Low Resistive Metal-Semiconductor Contacts IEEE VLSI Workshop on Test Structures Schreyer, T., A., Swirhun, S., Loh, W., Saraswat, K., Swanson, R. 1986: 7~23
  • Rapid Thermal Growth of Thin Insulators on Silicon Presented at the SPIE's O-E/LASE '86 Moslehi, M., Saraswat, K., C., Shatas, S., C. 1986
  • LOW-TEMPERATURE DIRECT NITRIDATION OF SILICON IN NITROGEN PLASMA GENERATED BY MICROWAVE-DISCHARGE JOURNAL OF APPLIED PHYSICS Moslehi, M. M., Fu, C. Y., Sigmon, T. W., Saraswat, K. C. 1985; 58 (6): 2416-2419
  • ANALYSIS AND SCALING OF KELVIN RESISTORS FOR EXTRACTION OF SPECIFIC CONTACT RESISTIVITY IEEE ELECTRON DEVICE LETTERS Loh, W. M., Saraswat, K., DUTTON, R. W. 1985; 6 (3): 105-108
  • CURRENT CROWDING EFFECTS AND DETERMINATION OF SPECIFIC CONTACT RESISTIVITY FROM CONTACT END RESISTANCE (CER) MEASUREMENTS IEEE ELECTRON DEVICE LETTERS SWIRHUN, S. E., Loh, W. M., Swanson, R. M., Saraswat, K. C. 1985; 6 (12): 639-641
  • COMPOSITIONAL STUDIES OF THERMALLY NITRIDED SILICON DIOXIDE (NITROXIDE) JOURNAL OF THE ELECTROCHEMICAL SOCIETY Moslehi, M. M., Han, C. J., Saraswat, K. C., Helms, C. R., SHATAS, S. 1985; 132 (9): 2189-2197
  • TIME-DEPENDENT COMPOSITIONAL VARIATION IN SIO2-FILMS NITRIDED IN AMMONIA APPLIED PHYSICS LETTERS Han, C. J., Moslehi, M. M., Helms, C. R., Saraswat, K. C. 1985; 46 (7): 641-643
  • LAYERED AND HOMOGENEOUS FILMS OF ALUMINUM AND ALUMINUM SILICON WITH TITANIUM AND TUNGSTEN FOR MULTILEVEL INTERCONNECTS IEEE TRANSACTIONS ON ELECTRON DEVICES Gardner, D. S., MICHALKA, T. L., Saraswat, K. C., Barbee, T. W., McVittie, J. P., Meindl, J. D. 1985; 32 (2): 174-183
  • THERMAL NITRIDATION OF SI AND SIO2 FOR VLSI IEEE JOURNAL OF SOLID-STATE CIRCUITS Moslehi, M. M., Saraswat, K. C. 1985; 20 (1): 26-43
  • THIN SIO2 INSULATORS GROWN BY RAPID THERMAL-OXIDATION OF SILICON APPLIED PHYSICS LETTERS Moslehi, M. M., SHATAS, S. C., Saraswat, K. C. 1985; 47 (12): 1353-1355
  • LAYERED AND HOMOGENEOUS FILMS OF ALUMINUM AND ALUMINUM SILICON WITH TITANIUM AND TUNGSTEN FOR MULTILEVEL INTERCONNECTS IEEE JOURNAL OF SOLID-STATE CIRCUITS Gardner, D. S., MICHALKA, T. L., Saraswat, K. C., Barbee, T. W., McVittie, J. P., Meindl, J. D. 1985; 20 (1): 94-103
  • THERMAL NITRIDATION OF SI AND SIO2 FOR VLSI IEEE TRANSACTIONS ON ELECTRON DEVICES Moslehi, M. M., Saraswat, K. C. 1985; 32 (2): 106-123
  • MODELING AND CHARACTERIZATION OF DOPANT REDISTRIBUTIONS IN METAL AND SILICIDE CONTACTS IEEE TRANSACTIONS ON ELECTRON DEVICES Shenai, K., Sangiorgi, E., Swanson, R. M., Saraswat, K. C., DUTTON, R. W. 1985; 32 (4): 793-799
  • AN ACCURATE METHOD TO EXTRACT SPECIFIC CONTACT RESISTIVITY USING CROSS-BRIDGE KELVIN RESISTORS IEEE ELECTRON DEVICE LETTERS Loh, W. M., SWIRHUN, S. E., Crabbe, E., Saraswat, K., Swanson, R. M. 1985; 6 (9): 441-443
  • A VLSI-SUITABLE SCHOTTKY-BARRIER CMOS PROCESS IEEE TRANSACTIONS ON ELECTRON DEVICES SWIRHUN, S. E., Sangiorgi, E., WEEKS, A. J., Swanson, R. M., Saraswat, K. C., DUTTON, R. W. 1985; 32 (2): 194-202
  • ANNEALING OF OXIDE FIXED CHARGES IN SCALED POLYSILICON GATE MOS STRUCTURES IEEE TRANSACTIONS ON ELECTRON DEVICES Kao, D. B., Saraswat, K. C., McVittie, J. P. 1985; 32 (5): 918-925
  • A VLSI-SUITABLE SCHOTTKY-BARRIER CMOS PROCESS IEEE JOURNAL OF SOLID-STATE CIRCUITS SWIRHUN, S. E., Sangiorgi, E., WEEKS, A. J., Swanson, R. M., Saraswat, K. C., DUTTON, R. W. 1985; 20 (1): 114-122
  • RAPID THERMAL NITRIDATION OF SIO2 FOR NITROXIDE THIN DIELECTRICS APPLIED PHYSICS LETTERS Moslehi, M. M., Saraswat, K. C., SHATAS, S. C. 1985; 47 (10): 1113-1115
  • 2-D Simulations for Accurate Extraction of the Specific Contact Resistivity from Contact Resistance Data Digest of IEEE International Electron Device Meeting Loh, W., M., Swirhun, S., E., Schreyer, T., A., Swanson, R., M., Saraswat, K., C. 1985: 586~589
  • Proc. International Symposium on VLSI Low Temperature Direct Nitridation of Silicon in Nitrogen Plasma Generated by Microwave Discharge Moslehi, M., Fu, C., Y., Saraswat, K., C., Bruce, R. 1985: 286~290
  • Two-Dimensional Silicon Oxidation Experiments and Theory Digest of IEEE Electron Device Meeting Kao, D., B., McVittie, J., P., Nix, W., D., Saraswat, K., C. 1985: 388~391
  • Analysis and Scalings for Extraction of Specific Contact Resistivity IEEE Electron Device Letters Loh, W., M., Saraswat, K., C., Dutton, R., W. 1985; EDL-6: 105~108
  • Low Temperature Nitridation of Silicon in Microwave Nitrogen Plasma The 167th Meeting of the Electrochemical Society Moslehi, M., Fu, C., Y., Saraswat, K., C., Bruce, R. 1985
  • Hydrogenation by Ion Implantation IEEE Electron Dev. Lett. Singh, H., Saraswat, K., C., Shott, J., D., McVittie, J., P., Meindl, J., D. 1985; EDL-6 (3): 139~141
  • Formation of 0.1 1 mm N+/P and P+/N Junctions by Doped Silicide Technology Digest of IEEE Int. Electron Device Meeting Shone, F., Saraswat, K., C., Plummer, J., D. 1985: 407~410
  • Use of Silicides Obtained by CVD in VLS Presented at the Workshop on Silicides Saraswat, K., C. 1985
  • HYDROGENATION BY ION-IMPLANTATION FOR SCALED SOI/PMOS TRANSISTORS IEEE ELECTRON DEVICE LETTERS Singh, H. J., Saraswat, K. C., SHOTT, J. D., McVittie, J. P., Meindl, J. D. 1985; 6 (3): 139-141
  • ACCURATE BARRIER MODELING OF METAL AND SILICIDE CONTACTS IEEE ELECTRON DEVICE LETTERS Shenai, K., Sangiorgi, E., Saraswat, K. C., Swanson, R. M., DUTTON, R. W. 1984; 5 (5): 145-147
  • CONTACT RESISTANCE OF LPCVD-W/AL AND PTSI/W/AL METALLIZATION IEEE ELECTRON DEVICE LETTERS Swirhun, S., Saraswat, K. C., Swanson, R. M. 1984; 5 (6): 209-211
  • CVD TUNGSTEN - A SOLUTION FOR THE POOR STEP COVERAGE AND HIGH CONTACT RESISTANCE OF ALUMINUM SOLID STATE TECHNOLOGY BRORS, D. L., MONNIG, K. A., Fair, J. A., CONEY, W., Saraswat, K. C. 1984; 27 (4): 313-314
  • Thermal Oxidation of Silicides Journal of Applied Physics Lie, L., N., Tiller, W., A., Saraswat, K., C. 1984; 7 (56): 2127~2132
  • THERMAL-OXIDATION OF SILICIDES JOURNAL OF APPLIED PHYSICS LIE, L. N., Tiller, W. A., Saraswat, K. C. 1984; 56 (7): 2127-2132
  • PROPERTIES OF LOW-PRESSURE CVD TUNGSTEN SILICIDE FOR MOS VLSI INTERCONNECTIONS IEEE TRANSACTIONS ON ELECTRON DEVICES Saraswat, K. C., BRORS, D. L., Fair, J. A., MONNIG, K. A., Beyers, R. 1983; 30 (11): 1497-1505
  • Scaling of SOI/PMOS Transistors Technical Digest of IEEE International Electron Device Meeting Singh, H., Saraswat, K., C., Shott, J., D., McVittie, J., P., Meindl, J., D. 1983: 67~69
  • PROPERTIES OF LOW-PRESSURE CVD TUNGSTEN SILICIDE AS RELATED TO IC PROCESS REQUIREMENTS SOLID STATE TECHNOLOGY BRORS, D. L., Fair, J. A., MONNIG, K. A., Saraswat, K. C. 1983; 26 (4): 183-186
  • Thermal Oxidation of Tantalum Silicide in O2 and H2O Applied Physics Letters Saraswat, K., C., Nowicki, R., S., Moulder, J., F. 1982; 41 (12): 1127~1129
  • EFFECT OF SCALING OF INTERCONNECTIONS ON THE TIME-DELAY OF VLSI CIRCUITS IEEE TRANSACTIONS ON ELECTRON DEVICES Saraswat, K. C., Mohammadi, F. 1982; 29 (4): 645-650
  • THERMAL-OXIDATION OF HEAVILY PHOSPHORUS-DOPED THIN-FILMS OF POLYCRYSTALLINE SILICON JOURNAL OF THE ELECTROCHEMICAL SOCIETY Saraswat, K. C., Singh, H. 1982; 129 (10): 2321-2326
  • DIFFUSION OF ARSENIC IN POLYCRYSTALLINE SILICON APPLIED PHYSICS LETTERS Swaminathan, B., Saraswat, K. C., DUTTON, R. W., Kamins, T. I. 1982; 40 (9): 795-798
  • Thermal Oxidation of Phosphorus Doped Polycrystalline Silicon Journal Electrochemical Society Saraswat, K., C., Singh, H. 1982; 129: 2321~2326
  • Effect of Interconnection Scaling on Time Delay of VLSI Circuits IEEE Transaction Electron Devices Saraswat, K., C., Mohammadi, F. 1982; ED-29: 645~650
  • Refractory Metal Silicides for Interconnections in VLSI American Physics Society Saraswat, K., C. 1982
  • A MODEL FOR CONDUCTION IN POLYCRYSTALLINE SILICON - .2. COMPARISON OF THEORY AND EXPERIMENT IEEE TRANSACTIONS ON ELECTRON DEVICES MANDURAH, M. M., Saraswat, K. C., Kamins, T. I. 1981; 28 (10): 1171-1176
  • N-CHANNEL MOSFETS WITH WSI2 GATE ELECTRON DEVICE LETTERS Mohammadi, F., Saraswat, K. C. 1981; 2 (2): 24-25
  • A MODEL FOR CONDUCTION IN POLYCRYSTALLINE SILICON - .1. THEORY IEEE TRANSACTIONS ON ELECTRON DEVICES MANDURAH, M. M., Saraswat, K. C., Kamins, T. I. 1981; 28 (10): 1163-1171
  • Thermal Oxidation of Heavily Doped Polycrystalline Silicon Thin Films Extended Abstracts of the Spring Meeting of Electrochemical Society Singh, H., Saraswat, K., C. 1981; 81-1
  • ARSENIC SEGREGATION IN POLYCRYSTALLINE SILICON APPLIED PHYSICS LETTERS MANDURAH, M. M., Saraswat, K. C., Kamins, T. I. 1980; 36 (8): 683-685
  • MONOLITHIC INTEGRATED-CIRCUIT FABRICATED IN LASER-ANNEALED POLYSILICON IEEE TRANSACTIONS ON ELECTRON DEVICES Kamins, T. I., Lee, K. F., Gibbons, J. F., Saraswat, K. C. 1980; 27 (1): 290-293
  • WORK FUNCTION OF WSI2 ELECTRON DEVICE LETTERS Saraswat, K. C., Mohammadi, F. 1980; 1 (2): 18-19
  • PROPERTIES OF SPUTTERED TUNGSTEN SILICIDE FOR MOS INTEGRATED-CIRCUIT APPLICATIONS JOURNAL OF THE ELECTROCHEMICAL SOCIETY Mohammadi, F., Saraswat, K. C. 1980; 127 (2): 450-454
  • HIGH-VOLTAGE MOSFET IN POLYCRYSTALLINE SILICON IEEE TRANSACTIONS ON ELECTRON DEVICES Mohammadi, F., Saraswat, K. C., Meindl, J. D. 1980; 27 (1): 293-295
  • DOPANT SEGREGATION IN POLYCRYSTALLINE SILICON JOURNAL OF APPLIED PHYSICS MANDURAH, M. M., Saraswat, K. C., Helms, C. R., Kamins, T. I. 1980; 51 (11): 5755-5763
  • STUDIES OF STEAM-OXIDIZED WSI2 BY AUGER SPUTTER PROFILING APPLIED PHYSICS LETTERS Rouse, J., Mohammadi, F., Helms, C. R., Saraswat, K. C. 1980; 37 (3): 305-307
  • A Monolithic Integrated Circuit Fabricated in Laser-Annealed Polysilicon IEEE Transaction Electron Devices Kamins, T., I., Lee, K., F., Gibbons, J., F., Saraswat, K., C. 1980; ED-27: 290~293
  • WSi2 Gate MOS Technology 8th International Vacuum Congress Saraswat, K., C., Mohammadi, F., Beaudouin, J. 1980
  • Effect of Temperature and Substrate on the Steam Oxidation Mechanism of Thin WSi2 Films Extended Abstracts of 157th Meeting of Electrochemical Society Mohammadi, F., Sigmon, T., W., Saraswat, K., C. 1980: 422~424
  • Formation of WSi2 of Tungsten on Silicon Extended Abstracts of the 157th Meeting of Electrochemical Society Saraswat, K., C., Mohammadi, F. 1980: 419~421
  • A High Voltage MOSFET in Polycrystalline Silicon IEEE Transactions Electron Devices Mohammadi, F., Saraswat, K., C., Meindl, J., D. 1980; ED-27: 293--295
  • Tungsten Silicide for MOS Gates and Low Resistivity Interconnections AIME, Ithaca, Cornell University, June 1980, The 22nd Electronics Materials Conference. Saraswat, K., C., Mohammadi, F. 1980
  • PHOSPHORUS DOPING OF LOW-PRESSURE CHEMICALLY VAPOR-DEPOSITED SILICON FILMS JOURNAL OF THE ELECTROCHEMICAL SOCIETY MANDURAH, M. M., Saraswat, K. C., Kamins, T. I. 1979; 126 (6): 1019-1023
  • KINETICS OF THE THERMAL-OXIDATION OF WSI2 APPLIED PHYSICS LETTERS Mohammadi, F., Saraswat, K. C., Meindl, J. D. 1979; 35 (7): 529-531
  • THIN-FILM MOSFETS FABRICATED IN LASER-ANNEALED POLYCRYSTALLINE SILICON APPLIED PHYSICS LETTERS Lee, K. F., Gibbons, J. F., Saraswat, K. C. 1979; 35 (2): 173-175
  • MODEL FOR DOPANT INCORPORATION INTO GROWING SILICON EPITAXIAL-FILMS .2. COMPARISON OF THEORY AND EXPERIMENT JOURNAL OF THE ELECTROCHEMICAL SOCIETY Reif, R., Kamins, T. I., Saraswat, K. C. 1979; 126 (4): 653-660
  • MODEL FOR DOPANT INCORPORATION INTO GROWING SILICON EPITAXIAL-FILMS .1. THEORY JOURNAL OF THE ELECTROCHEMICAL SOCIETY Reif, R., Kamins, T. I., Saraswat, K. C. 1979; 126 (4): 644-652
  • Thin Film MOSFET Fabricated in Laser-Annealed Polycrystalline Silicon Journal Applied Physics Letters Lee, K., F., Gibbons, J., F., Saraswat, K., C., Kamins, T., I. 1979; 35: 173~175
  • Effect of Annealing on the Properties of Thin Films of WSi2 Extended Abstracts of the Spring 1979 Meeting of the Electrochemical Society Saraswat, K., C., Mohammadi, F., Meindl, J., D. 1979; 79-1 (144)
  • A Model for Dopant Incorporation into Growing Si Epitaxial Films: I Theory Journal of Electrochem Society Reif, R., Kamins, T., I., Saraswat, K., C. 1979; 126 (4): 644~652
  • Thermal Oxidation of Sputtered Thin Films of WSi2 Extended Abstracts of the Fall 1979 Meeting of the Electrochemical Society Mohammadi, F., Saraswat, K., C., Meindl, J., D. 1979; 79-2 (393)
  • WSi2 Gate MOS Devices Technical Digest of the International Electron Device Meeting Saraswat, K., C., Mohammadi, F., Meindl, J., D. 1979
  • Dopant Segregation in Polycrystalline Silicon Extended Abstracts of the Fall 1979 Meeting of the Electrochem Society Mandurah, M., M., Saraswat, K., C., Kamins, T., I. 1979; 79-2 (571)
  • A Model for Dopand Incorporation into Growing Si Epitaxial Films: II. Comparison of Theory and Experiment Journal Electrochemical Society Reif, R., Kamins, T., I., Saraswat, K., C. 1979; 125 (4): 653~660
  • STRUCTURE AND STABILITY OF LOW-PRESSURE CHEMICALLY VAPOR-DEPOSITED SILICON FILMS JOURNAL OF THE ELECTROCHEMICAL SOCIETY Kamins, T. I., MANDURAH, M. M., Saraswat, K. C. 1978; 125 (6): 927-932
  • TRANSIENT AND STEADY-STATE RESPONSE OF DOPANT SYSTEM OF A SILICON EPITAXIAL REACTOR - TRANSFER-FUNCTION APPROACH JOURNAL OF THE ELECTROCHEMICAL SOCIETY Reif, R., Kamins, T. I., Saraswat, K. 1978; 125 (11): 1860-1866
  • BREAKDOWN WALKOUT IN PLANAR P-N-JUNCTIONS SOLID-STATE ELECTRONICS Saraswat, K. C., Meindl, J. D. 1978; 21 (6): 813-819
  • Doping of Low-Pressure Chemically-Vapor-Deposited Silicon Films Fall 1978 Meeting of the Electrochemical Society Mandurah, M., M., Saraswat, K., C., Kamins, T., I. 1978
  • A Model for Dopant Incorporation into Silicon Epitaxial Films Extended Abstracts of the Spring 1978 Meeting of the Electrochemical Society Reif, R., Kamins, T., I., Saraswat, K., C. 1978; 78-1 (208)
  • LOW-TEMPERATURE DIFFUSION OF BORON FROM DIBORANE USING CARBON-DIOXIDE AS OXIDANT JOURNAL OF THE ELECTROCHEMICAL SOCIETY Saraswat, K. C., Meindl, J. D. 1977; 124 (3): 471-472
  • Low Temperature Diffusion of Boron from Diborane Using Carbon Dioxide as Oxidant J. Electrochemical Society Saraswat, K., C., Meindl, J., D. 1977; 124 (3): 471~472
  • The Need of Process Models in an Ubiquitous Technology The Electrochemical Society, Inc. Meindl, J., D., Saraswat, K., C., Plummer, J., D. 1977: 894~909
  • A New Bipolar Process - Borsenic IEEE Journal of Solid State Circuits Saraswat, Krishna, C., Meindl, J., D. 1976; SC-11: 495~499
  • NEW BIPOLAR PROCESS - BORSENIC IEEE JOURNAL OF SOLID-STATE CIRCUITS Saraswat, K. C., Meindl, J. D. 1976; 11 (4): 495-500
  • A High Voltage MOS Switch IEEE Journal of Solid-State Circuits Saraswat, Krishna, C., Meindl, J., D., Berger, J. 1975; SC-10: 136~142
  • HIGH-VOLTAGE MOS SWITCH IEEE JOURNAL OF SOLID-STATE CIRCUITS Saraswat, K. C., Meindl, J. D., Berger, J. 1975; SC10 (3): 136-142
  • Borsenic Bipolar Process Technical Digest of the International Electron Device Meeting, Washington D.C. Saraswat, Krishna, C. 1975: 437~439
  • H.V. Silicon-Gate MOS Integrated Circuits for Driving Piezoelectric Tactile Displays ISSCC Digest of Technical Papers, ISSCC Saraswat, Krishna, C., Meindl, J., D. 1974: 164~165

Books and Book Chapters


  • Germanium Nanodevices and Technology In Advanced Gate Stacks for High-Mobility Semiconductors Chui, C., O., Saraswat, K., C. edited by Dimoulas, A., Gusev, E., McIntyre, P. Springer-Verlag, London.. : 1
  • Study of performances of low-k Cu, CNTs, and Optical interconnects in Nanoelectronic Circuit Design Koo, K., H., Saraswat, K., C. edited by Jha, N., Chen, D. Springer. 2011: 377-408
  • Properties and Trade-offs of Compound Semiconductor MOSFETs in Fundamentals of III-V Semiconductor MOSFETs Krishnamohan, T., Kim, D., Saraswat, K., C. edited by Oktyabrsky, S., Ye, P., D. Springer. 2010: 7-30
  • Advances Germanium MOS Devices Germanium-Based Technologies: From Materials to Devices Chui, C., O., Saraswat, K., C. edited by Claeys, C., Simoen, E. Elsevier Science. 2007: 1
  • Nanoscale Germanium MOS Dielectrics and Junctions Germanium-Based Technologies: From Materials to Devices Chui, C., O., Saraswat, K., C. edited by Claeys, C., Simoen, E. Elsevier Science. 2007: 1
  • Structural Evolution And Point Defects In Metal Oxide-Based High-K Gate Dielectrics in Defects in High-k Dielectric Stacks McIntyre, P., C., Ki, H., S., Saraswat, K., C. edited by Gusev, E. Springer. 2006: 109-120
  • Performance Limitations of Si CMOS and Alternatives for Nanoelectronics Frontiers in Electronics: Proceedings of the WOFE-04 Saraswat, K., C., Chui, C., O., Kapur, P., Krishnamohan, T., Nayfeh, A., Okyay, A., K. edited by Iwai, H., Nishi, Y., Shur, M., S. World Scientific, New Jersey. 2006: 1
  • 3-D IC Deep Submicron Interconnect Performance Modeling and Analysis In Interconnect Technology and Design for Gigascale Integration Souri, S., J., Chiang, T., Y., Kapur, P., Banerjee, K., Saraswat, K., C. Boston. 2003: 325 - 382
  • Rapid Thermal Multiprocessing for a Programmable Factory For Manufacturing of ICs in Advances in Rapid Thermal and Integrated Processing Saraswat, K., C. edited by Roozeboom, F. Kluwer Academic Publishers, Dordrecht, The Netherlands. 1996: 375-414
  • An improved calibration methodology for modeling advanced isolation structures Simulation of semiconductor devices and processes Smeys, P., Griffin, P., B., Saraswat, K., C. edited by Ryssel, H., Pichler, P. 1995: 42
  • Simulation Studies of TiN PVD and CVD Thin Films forin-Film Processi Contact/Via Liners, in Modeling and Simulation of Thng Materials Research Society Symposium Proceedings Bang, D., S., McVittie, J., P., Saraswat, K., C., Iacponi, J., A., Gray, J., Krivokapic, Z. edited by Srolovitz, D., J. 1995: 173~179
  • Constant Current Stress Breakdown in Ultrathin SiO2Films in The Physics and Chemistry of SiO2 and the Si SiO2Interface 2 Apte, P., Kubota, T., Saraswat, K., C. edited by Helms, C., R., Deal, B., E. Plenum. 1993: 447~454
  • Silicon Epitaxy and Oxidation Meindl, J., D., Dutton, R., W., Saraswat, K., C., Plummer, J., D., Kamins, T., I., Deal, B., E. edited by Van de Wiele, F., Engl, W., L., Jaspers, P., G. Noordhoff-Leyden. 1977: 57~113

Conference Proceedings


  • Polycrystalline Silicon-Germanium for CMOS and TFT Applications Saraswat, K., C., King, T., J.
  • Interface Engineering for High-k/Si and High-k/Ge Structures McIntyre, P., C., Kim, H., Seo, K, I., Chui, C., O., Triplett, B., B., Lee, D, I., Saraswat, K.
  • Variability of III-V FinFETs and Hetero-Integration of III-V-OI using Rapid Melt Growth Yuan, Z., Kumar, A., Chen, C. -Y., Nainani1, A., Griffin, P., Wang, A., Saraswat, K. 2013
  • Germanium on Insulator (GOI) Structure Locally Grown on Silicon Using Hetero Epitaxial Lateral Overgrowth Nam, J. H., Jung, W., S., Shim, J., Ito, T., Nishi, Y., Park, J, H., Saraswat, K. 2013
  • Limits of Specific Contact Resistivity to Si, Ge and III-V Semiconductors Using Interfacial Layers Shine, G., Saraswat, Krishna, C. 2013
  • Performance Limitation of CMOS with Cu/low-k Interconnects and Possible Future Alternatives Saraswat, Krishna, C. 2013
  • Solid Phase Epitaxial Re-Growth Of Sn Ion Implanted Germanium Thin Films Giubertoni, D., Demenev, E., Gupta, S., Jestin, Y., Meirer, F., Gennaro, S., Saraswat, K. 2013
  • GaP Source-Drain SOI 1T-DRAM: Solving the Key Technological Challenges Pal, A., Nainani, A., Ye, Z., Bao, X., Sanchez, E., Saraswat, K., C. 2013
  • Surface Passivation of III-V Antimonides and Ge Based MOSFET Saraswat, Krishna, C., Gupta, S., Nainani, A., Yang, B., Yuan, Z. 2013
  • Performance Limitation of Cu/low-k Interconnects and Possible Future Alternatives Saraswat, Krishna, C. 2013
  • Si Compatible Ge Based Devices for Optical Interconnects Saraswat, Krishna, C. 2013
  • Fabrication of GeSn-On-Insulator (GSOI) to Enable Monolithic 3D Co-Integration of Logic and Photonics Lin, J., Y. J., Gupta, S., Huang, Y., C., Kim, Y., Jin, M., Sanchez, E., Saraswat, K. 2013
  • Effects of Oxidant Dosing on GaSb (100) prior to ALD and Antimonide-based PMOSFETs with Ni-alloy S/D Yuan, Z., Kumar, A., Chen, C. -Y., Kumar, A., Bennett, B., R., Boos, J., B., Saraswat, K. 2013
  • Enhancing hole mobility in III-V semiconductors Nainani, A., Bennett, B. R., Boos, J. B., Ancona, M. G., Saraswat, K. C. AMER INST PHYSICS. 2012

    View details for DOI 10.1063/1.4718381

    View details for Web of Science ID 000305363700077

  • GeSn Channel nMOSFETs: Material Potential and Technological Outlook Gupta, S., Vincent, B., Lin, D., Gunji, M., Firrincieli, A., Gencarelli, F., Saraswat, K. 2012
  • InGaSb: single channel solution for realizing III-V CMOS Yuan, Z., Nainani, A., Kumar, A., Guan, X., Bennett, B., R., Boos, J., B., Saraswat, K. 2012
  • Ge Based MOSFETs and Optical devices for Interconnects Integrated on Si Saraswat, Krishna, C. 2012
  • Electric Field Effects in Semiconductor Spin Transport-A Transfer Matrix Formalism Roy, A. M., Nikonov, D. E., Saraswat, K. C. IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC. 2011: 2746-2749
  • Fermi-level pinning at metal/GaSb interface and demonstration of InxGa1-xSb channel Schottky pMOSFETs with metal S/D Yuan, Z., Nainani, A., Lin, J., Y., Bennett, B., R., Boos, J., B., Ancona, M., G., Saraswat, K. 2011
  • Performance Limitation of Cu/low-k Interconnects and Possible Future Alternatives: CNT, 3-D and Optics Saraswat, Krishna, C. 2011
  • Germanium/Silicon based Novel Electronic and Optoelectronic Devices for Nanoelectronics Saraswat, Krishna, C. 2011
  • Heterostructure design and demonstration of InGaSb channel III-V CMOS transistors Yuan, Z., Nainani, A., Bennett, B., R., Boos, B., J., Ancona, M., G., Saraswat, K., C. 2011
  • A sub 350ºC Self Aligned GaSb pMOSFET with ALD high-k dielectric Nainani, A., Irisawa, T., Sun, Y., Crnogorac, F., Saraswat, K. 2010
  • Effect of isochronal hydrogen annealing on surface roughness and threading dislocation density of epitaxial Ge films grown on Si Kobayashi, S., Nishi, Y., Saraswat, K. C. ELSEVIER SCIENCE SA. 2010: S136-S139
  • 3-D ICs: Motivation, Performance Analysis, Technology and Applications Saraswat, Krishna, C. 2010
  • Interface studies of ALD-grown metal oxide insulators on Ge and III-V semiconductors McIntyre, P. C., Oshima, Y., Kim, E., Saraswat, K. C. ELSEVIER SCIENCE BV. 2009: 1536-1539
  • Effect of Interfacial Oxide on Ge MOSCAP Characteristics Kuzum, D., Park, J., Krishnamohan, T., Saraswat, K., C. 2009
  • Metal-Induced Dopants Activation (MIDA) on Amorphous Germanium for Monolithic 3D-ICs Park, J., Tada, M., Yoo, K., Jung, W., S., Wong, H. -S., P., Saraswat, K., C. 2009
  • Effect of Isochronal Hydrogen Annealing on Surface Roughness and Threading Dislocation Density of Epitaxial Ge on Si Kobayashi, S., Nishi, Y., Saraswat, K., C. 2009
  • Interface StudiesofMetalOxideInsulatorsonGeand III-V Semiconductors McIntyre, Paul, C., Kim, E., Chagarov, E., Cagnon, J., Saraswat, K., C., Stemmer, S. 2009
  • Ge MOSFET and Single T DRAM Saraswat et al, Krishna, C. 2009
  • Understanding Endurance Degradation in Flash Memory through Transconductance Measurement Verma, S., Bersuker, G., Gilmer, D., C., Padovani, A., Park, H., Nainani, A., Saraswat, K. 2009
  • Mobility Enhancement by Uniaxial Stress in (100) Ge NMOSFET with Interfacial Gate Dielectric GeO2 Grown by SPA Radical Oxidation Kobayashi, M., Irisawa, T., Kope, B., M., Sun, Y., Saraswat, K., Wong, H. -S., Philip 2009
  • Fully Low Temperature (350oC) Processed Si PMOSFET with Poly-Ge Gate, Radical Oxidation of Gate-Oxide and Schottky Source/Drain for Monolithic 3D-ICs Tada, M., Park, J., Kuzum, D., Thareja, G., Nishi, Y., Saraswat, K., C. 2009
  • Effect of Isochronal Hydrogen Annealing on Surface Roughness and Threading Dislocation Density of Epitaxial Ge on Si Kobayashi, Shin-ichi., Nishi, Y., Saraswat, K., C. 2009
  • Low temperature processes using Ni-induced Crystallization Technique for Monolithic Three Dimensional Integration Park, J., Tada, M., Peng, H., Saraswat, K., C. 2008
  • Fermi-Level Depinning of GaAs for Ohmic Contacts Hu, J., Choi, D., Harris, J., S., Saraswat, K., Wong, H. -S., P. 2008
  • Feasibility of SiO2/Al2O3 Tunnel Dielectric for Future Flash Memories Generations Padovani, A., Larcher, L., Verma, S., Pavan, P., Majhi, P., Kapur, P., Saraswat, K. 2008
  • Statistical Modeling of Leakage Currents through SiO2/High-K dielectric stacks for non-voltaile memory applications Padovani, A., Larcher, L., Verma, S., Pavan, P., Majhi, P., Parat, K., Saraswat, K. 2008
  • Performance Evaluation of III-V Double-Gate n-MOSFETs Kim, D., Krishnamohan, T., Saraswat, K., C. 2008
  • T3, Defect Study of Al/HfO2/Si Gate Stacks by Inelastic Electron Tunneling Spectroscopy Kim, E., Saraswat, K., C., Mcintyre, P. 2008
  • High performance, uniaxially-strained, silicon and germanium, double-gate p-MOSFETs Krishnamohan, T., Jungemann, C., Kim, D., Ungersboeck, E., Selberherr, S., Pham, A., Meinerzhagen, B., Wong, P., Nishi, Y., Saraswat, K. C. ELSEVIER SCIENCE BV. 2007: 2063-2066
  • Atomic Layer Deposition of HfO2 on III-V Semiconductors: Effects of Surface Treatment and Post-Deposition Anneals Kim, E., Chen, P, T., Choi, D., Harris, J., Nishi, Y., Saraswat, K. 2007
  • Research Through Collaboration between Academia and Industry Saraswat, K., C. 2007
  • Low Temperature, Metal(Ni)-Induced Lateral Crystallization(MILC) of amorphous(a)-Germanium(Ge) for 3-Dimensional Integrated Circuits(3D ICs) Park, J., Kapur, P., Peng, H., Saraswat, K., C. 2007
  • High Mobility Materials and Novel Device Structures for High Performance Nanoscale MOSFETs Saraswat, K., C. 2007
  • Feasibility Study of Composite Dielectric Tunnel Barriers for Flash Memory Verma, S., Pop, E., Kapur, P., Majhi, P., Parat, K., Saraswat, K., C. 2007
  • Novel Si-based CMOS Optoelectronic Switching Device Operating in the Near Infrared Okyay, Ali, K., Pethe, A., J., Kuzum, D., Latif, S., Miller, D., A. B., Saraswat, K., C. 2007
  • Performance Limitations of Cu/low-k Interconnects and Possible Alternatives Saraswat, K., C. 2007
  • Electro-Thermally Coupled Power Optimization for Future Transistors Chao, A., K., Kapur, P., Morifuji, E., Saraswat, K., C., Nishi, Y. 2007
  • High Mobility, Low Parasitic Resistance Si/Ge/Si Heterostructure Channel Schottky Source/Drain PMOSFETs Pethe, A., Saraswat, K. 2007
  • Design Guidelines for High Mobility Channel Bulk n-MOSFETs Smith, L., Fujiwara, M., Saraswat, K., Nishi, Y. 2007
  • High performance germanium MOSFETs Saraswat, K., Chui, C. O., Krishnamohan, T., Kim, D., Nayfeh, A., Pethe, A. ELSEVIER SCIENCE SA. 2006: 242-249
  • Interface Layers for High-k/Ge Gate Stacks: Are They Necessary? McIntyre, P., Chi, D., Chui, C., Kim, H., Seo, K., Saraswat, K. 2006
  • Ge on Si by Novel Heteroepitaxy for High Efficiency Near Infrared Photodetection Okyay, Ali, K., Nayfeh, A., M., Saraswat, K., C., Marshall, A., McIntyre, Paul, C. 2006
  • Germanium Surface Cleaning with Hydrochloric Acid Kim, Jungup., McVittie, J., Saraswat, K., Nishi, Y. 2006
  • Very High Performance, Ultrathin, Strained-Ge Channel, Heterostructure FETs with High Mobility and Low BTBT Leakage Krishnamohan, T., Kim, D., Nishi, Y., Saraswat, K. 2006
  • Evaluating Strained/Relaxed-Ge, Strained-Si, Strained-SiGe For Future Nanoscale p-MOSFETs Krishnamohan, T., Kim, D., Jungemann, C., Nishi, Y., Saraswat, K., C. 2006
  • Strained-Si, Relaxed-Ge Or Strained-(Si) Ge For Future Nanoscale p-MOSFETs Krishnamohan, T., Kim, D., Jungemann, C., Nishi, Y., Saraswat, K., C. 2006
  • Very High Performance, Ultra-thin, Strained-Ge Channel, Heterostructure FETs With High Mobility And Low BTBT Leakage Krishnamohan, T., Kim, D., Celler, G., Nishi, Y., Saraswat, K., C. 2006
  • Germanium MOSFETs for Nanoelectronics Saraswat, K. 2006
  • Ge based high performance nanoscale MOSFETs Saraswat, K. C., Chui, C. O., Krishnamohan, T., Nayfeh, A., McIntyre, P. ELSEVIER SCIENCE BV. 2005: 15-21
  • Soft X-ray Photoemission Studies of HfO2 on Ge (001) Seo, K., I., Sun, S., Lee, D., I., Pianetta, P., Saraswat, K., C., McIntyre, P., C. 2005
  • The Impact of Technology on Power for High-speed Electrical and Optical Interconnects Cho, H., Kapur, P., Saraswat, K., C. 2005
  • Performance Limitations of Si CMOS and Alternatives for Nanoelectronics Saraswat, K., C., Chui, C., O., Krishnamohan, T., Nayfeh, A., Shenoy, R., S. 2005
  • Performance Limitations of Si CMOS and Alternatives for Nanoelectronics Saraswat, K., C. 2005
  • The Need for New Materials to Scale CMOS Devices Saraswat, K., C. 2005
  • Ge Based High Performance MOSFETs Saraswat, K., C., Chui, C., O., Krishnamohan, T., Nayfeh, A., Kim, H., McIntyre, P. 2005
  • High Quality Heteroepitaxial-GE Layers on SI by Multi-Step Hydrogen Annealing and Re-Growth Nayfeh, A., M., Chui, C., O., Yonehara, T., Saraswat, K. 2005
  • Ge Based High Performance Nanoscale MOSFETs Saraswat, K., C., Chui, C., O., Krishnamohan, T., Nayfeh, A., McIntyre, P., C. 2005
  • A Reason for Poor Ge n-MOSFET Performance: Source/Drain Junction Dose-Dependent Activation Chui, C., O., Kulig, L., Moran, J., Tsai, W., Saraswat, K., C. 2005
  • Ge Based High Performance Nanoscale MOSFETs and Integrated Optical Interconnects Saraswat, K., C., Chui, C., O., Nayfeh, A., Kim, H., Okyay, A., K., McIntyre, P., C. 2005
  • Low Defect Ultra-thin Fully Strained Germanium MOSFET on relaxed Silicon with High Mobility and Low Band-To-Band-Tunneling (BTBT) Krishnamohan, T., Krivokapic, Z., Uchida, K., Nishi, Y., Saraswat, K. 2005
  • High-k (ZrO2, HfO2) Dielectrics on Si Substrates Synthesized by Elevated Temperature UV-Ozone Oxidation Technique Seo, K. i., McIntyre, P., C., Saraswat, K. 2004
  • Performance Limitations of Devices and Interconnects and Possible Alternatives for Nanoelectronics Saraswat, K., C. 2004
  • Metal Oxide/Semiconductor Interfaces in UV-Ozone Oxidized High-k Dielectric Stacks on Si and Ge (001) Substrates Chi, D., Chui, C., O., Ramanathan, S., Triplett, B., Saraswat, K., C., McIntyre, P., C. 2004
  • Novel Process for Fully Self-Aligned Planar Ultrathin Body Double-Gate FET Shenoy, R., S., Saraswat, Krishna, C. 2004
  • High-k Interface Engineering: the Interaction of Reactive Metal Electrodes with ALD-ZrO2/SiO2 and HfO2/SiO2 Gate Stacks Kim, H., McIntyre, P., C., Stemmer, S., Chui, C., O., Saraswat, K., C. 2004
  • 3-Dimensional ICs: Motivation, Performance Analysis and Technology Saraswat, K., C. 2004
  • Ge Surface Passivation for High Performance MOSFETs Saraswat, K., C., Chui, C., O., Neyfeh, A., Kim, H., McIntyre, P. 2004
  • Power Comparison between High-speed Electrical and Optical Interconnects for Inter-chip Communication Cho, H., Kapur, P., Saraswat, K., C. 2004
  • Ge and SiGe for High Performance MOSFETs and Integrated Optical Interconnects Saraswat, K., C., Chui, C., O., Krishnamohan, T., Okyay, A., K., Kim, H., McIntyre, P. 2004
  • Novel Deposition Processes for High-k/Ge Devices: Interface Engineering McIntyre, P., Kim, H., Chi, D., Chui, C., O., Triplett, B., Javey, A., Saraswat, K. 2004
  • High-k Interface Engineering: the Interaction of Reactive Metal Electrodes with ALD-ZrO2/SiO2 and HfO2/SiO2 Gate Stacks Kim, H., McIntyre, P., C., Stemmer, S., Chui, C., O., Saraswat, K., C. 2004
  • Ge MOS Dielectric Stack with ALD High-k Metal Oxide and Oxynitride Interlayer Chui, C., O., Kim, H., McIntyre, P., C., Saraswat, K., C. 2004
  • Synchrotron Radiation Photoemission Spectroscopy of High-k Gate Stack in High-performance Ge MOS Devices Chui, C., O., Lee, D., I., Singh, A., A., Chi, D., McIntyre, P., C., Pianetta, P., A., Saraswat, K. 2004
  • Optimization of extrinsic source/drain resistance in ultrathin body double-gate FETs Shenoy, R. S., Saraswat, K. C. IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC. 2003: 265-270
  • Optical interconnects for future high performance integrated circuits Kapur, P., Saraswat, K. C. ELSEVIER SCIENCE BV. 2003: 620-627
  • A Novel Self-aligned Gate-last MOSFET Process Comparing the High-k Candidates Chui, C., O., Kim, H., McVittie, J., P., Triplett, B., B., McIntyre, P., C., Saraswat, K., C. 2003
  • Multi University Research Centers in USA for Device and Interconnect Research Saraswat, K., C. 2003
  • High-k Metal Oxides Dielectrics on Ge (100) Substrates Chi, D., Triplett, B., B., McIntyre, P., C., Chui, C., O., Saraswat, K., C., Garfunkel, E. 2003
  • Mass Transfer for Cross-Contamination with ZrO2 Plasma Etching Liao, M., Y., McVittie, J., P., Deal, M., D., Saraswat, K., C., Schueler, B. 2003
  • Atomic Layer Deposition of ZrO2 on Si and Ge Substrate Kim, H., McIntyre, P., C., Chui, C., O., Saraswat, K., C. 2003
  • UV-Ozone Oxidized High-k Dielectrics on Si and Ge Substrates Chi, D., Chui, C., O., Ramanathan, S., Triplett, B., B., Saraswat, K., C., McIntyre, P., C. 2003
  • The Structural and Electrical Properties of Ultra-Thin HfO2 and Nanolaminates Synthesized by Atomic Layer Deposition Kim, H., McIntyre, P., C., Saraswat, K., C. 2003
  • Power Estimation in Global Interconnects and its Reduction using a Novel Repeater Optimization Methodology Kapur, P., Chandra, G., Saraswat, K., C. 2002
  • Scaling Trends for the On Chip Power Dissipation Chandra, G., Kapur, P., Saraswat, K., C. 2002
  • Ultrathin High-k Gate Dielectric Technology for Germanium MOS Applications Chui, C. O., Ramanathan, S., Triplett, B., B., McIntyre, P., C., Saraswat, K., C. 2002
  • Electromigration Reliability of Low Capacitance Air-Gap Interconnect Structures Shieh, B., P., Deal, M., D., Saraswat, K., C., Choudhury, R., Park, C, W., Sukharev, V. 2002
  • A Methodology for the Interconnect Performance Evaluation of 2D and 3D Processors with Memory Chandra, G., Kapur, P., Saraswat, K., C. 2002
  • Interconnect Limits on Gigascale Integration(Gsi) In The 21st Century Davis, J., A., Venkatesan, R., Kaloyeros, A., Beylansky, M., Souri, S., J., Banerjee, K., Saraswat, K. 2001
  • Lateral Gate All-Around (GAA) poly-Si Transistors Kalavade, P., Saraswat, K., C. 2001
  • Phase Diagram Simulations in Amorphous metal Silicate Systems Kim, H., McIntyre, P, C., Saraswat, K. 2001
  • 3-D ICs: A Novel Chip Design for Improving Deep Submicron Interconnect Performance and Systems-on-Chip Integration Banerjee, K., Souri, S., J. 2001
  • A New Analytical Thermal Model for Multilevel ULSI Interconnects Incorporating Via Effect Chiang, T., Y., Banerjee, K., Saraswat, K., C. 2001
  • Realistic Copper Interconnect Performance with Technological Constraints,Interconnect Performance Modeling for 3-D ICs With Multiple Si Layers Kapur, P., McVittie, J., P., Saraswat, K., C. 2001
  • Si/ZrO2/Si Gate Stack Systems Perkins, C., M., Triplett, B., B., McIntyre, P., C., Saraswat, K. 2001
  • Interconnect Limits on Gigascale Integration (GSI) in the 21st Century Davis, J., A., Venkatesan, R., Kaloyeros, A., Beylansky, M., Souri, S., J., Banerjee, K., Saraswat, K. 2001
  • Control of Amorphous Si Crystallization Using Ge Deposited by LPCVD Toita, M., Kalavade, P., Saraswat, K., C. 2000
  • A Novel sub-10nm transistor Kalavade, P., Saraswat, K., C. 2000
  • Multiple Si Layer ICs: Motivation, Performance Analysis, and Design Implications Souri, S., J., Banerjee, K., Mehrotra, A., Saraswat, K., C. 2000
  • 3-D ICs: Motivation, Performance Analysis, and Technology Saraswat, K., C., Banerjee, K., Joshi, A., R., Kalavade, P., Kapur, P., Sour, S., J. 2000
  • Effects of VUV on Plasma Charging McVittie, J., P., Joshi, M., Saraswat, K., C. 2000
  • Direct Experimental Determination and Modeling of VUV Induced Bulk Conduction in Dielectrics during Plasma Processing Joshi, M., McVittie, J., P., Saraswat, K. 2000
  • Measurement of VUV Induced Surface Conduction in Dielectrics Using Synchrotron Radiation Joshi, M., McVittie, J., P., Saraswat, K., Cismaru, C., Shohet, J., L. 2000
  • Quantitative Projections of Reliability and Performance for Low-k/CuInterconnect Systems Banerjee, K., Mehrotra, A., Hunter, W., R., Saraswat, K., C., Goodson, K., E., Wong, S., S. 2000
  • Polycrystalline-SiGe applications in Si CMOS Technology Saraswat, Krishna, C. 1999
  • Flux Characterization and Topography Simulation of HDP-CVD of Silicon Dioxide Shieh, B., P., McVittie, J., Deal, M., Saraswat, K., C., Nag, S. 1999
  • Dependence of Oxide Electric Field and Gate Electrode Workfunction on the Reliability of Thin MOS Gate Oxides Saraswat, K., C., Yang, T., C. 1999
  • Surface Morphology of Metallo-Organic CVD of Copper Films for Seed Layer in Integrated Interconnects Kapur, P., McVittie, J., Deal, M., Saraswat, K., C., Bubber, R., Shang, G. 1999
  • Novel 3-D Structures Saraswat, K., C., Souri, S., J., Subramanian, V., Joshi, A., R., Wang, A., W. 1999
  • Interconnect Performance Modeling for 3-D ICís With Multiple Si Layers Souri, S., J., Saraswat, K., C. 1999
  • Effect of interface stress on the quasi-breakdown of ultrathin oxide Lee, S., H., Sachdev, P., Yang, T., C., Bravman, J., C., Saraswat, K., C. 1999
  • Growth of High Quality Wet Oxide by Rapid Thermal Processing Sharangpani, R., das, J., Tay, S., P., Thakur, R., P. S., Yang, T., C., Saraswat, K., C. 1998
  • Air-Gap Formation During ILD Deposition to Lower Interconnect Capacitance Shieh, B., Bassman, L., C., Kim, D., K., Saraswat, K., C., Deal, M., McVittie, J., P. 1998
  • Seeding Technology for High Performance TFTs Saraswat, K., C., Subramanian, V. 1998
  • Passivation of poly-Si thin film transistors with ion-implanted deuterium Wang, A., W., Saraswat, K., C. 1998
  • Evidence for heterojunction effects in polycrystalline Si1-xGex thin film transistors with Si caps Wang, A., W., Saraswat, K., C. 1998
  • Silicon interlayer heterojunction effects in polycrystalline Si1-xGex thin film transistors Wang, A., W., Saraswat, K., C. 1998
  • Effect Of Interface Stress on Reliability of Gate Oxide Yang, T., C., Bhat, N., Saraswat, K., C. edited by Deen, J., Brown, M., Sundaram, K. 1997
  • Mesoscale Modeling of Diffusion in Polycrystalline Structures Bassman, L., C., Ibrahim, N., R., Pinsky, P., M., Saraswat, K., C., Deal, M., D. 1997
  • A Novel Technique for 3-D Integration: Ge-seeded Laterally Crystallized TFTs Subramanian, V., Saraswat, K., C. 1997
  • Compound GeSi Structures: Novel Measurement Algorithm via Optical Reflectance Sptryectromet Connelly, D., Saraswat, K., C. 1997
  • Laterally Crystallized Polysilicon TFTs Using Patterned Light Absorption Masks Subramanian, V., Saraswat, K., C. 1997
  • Cost Modeling of Low Temperature Large-Area Polysilicon TFT LCD Manufacturing Jurichich, S., Wood, S., C., Saraswat, K., C. 1997
  • Effect Of Interface Stress on Reliability of Gate Oxide Saraswat, K., C., Bhat, N., Yang, T., C. 1997
  • An alternative gate electrode material of fully depleted SOI CMOS for low power applications Hsiao, T., C., Wang, Albert, W., Saraswat, K., Woo, Jason, C.S. 1997
  • TMCTS for gate dielectric in thin film transistors Wang, A., Bhat, N., Saraswat, K. 1996
  • Simulation of Aluminum Surface Profile in Trenches and Contacts/Vias For Ionized Physical Vapor Deposition Kapur, P., Bang, D., S., McVittie, J., P., Saraswat, K., C. 1996
  • A Low Temperature Polycrystalline SiGe CMOS TFT Technology for Large Area AMLCD Drivers Saraswat, K., C., Jurichich, S., King, T., J., Subramanian, V., Wang, A. 1996
  • Modeling Measurements and Control of Rapid Thermal Processing Saraswat, K., C., Chen, Y., Khuri-Yakub, B., T. edited by Ravindra, N., M., Singh, R., K. 1996
  • Scaling Limits for Interconnect Technology Saraswat, K., C. 1996
  • Transistor Sizing for AMLCD Integrated TFT Drive Circuits Tomita, S., Jurichich, S., S., Saraswat, K., C. 1996
  • Effect of annealing ambient on performance and reliability of LPCVD oxides for TFTs Bhat, N., Wang, A., Saraswat, K. 1996
  • A Novel Technique for In-Situ Monitoring of Crystallinity and Temperature During Rapid Thermal Annealing of Thin Si/Si-Ge Films on Quartz/Glass Subramanian, V., Degertekin, F., L., Dankoski, P., P., Khuri-Yakub, B., T., Saraswat, K., C. 1996
  • Simulation Studies of TiN PVD and CVD Thin Films forin-Film Processi Contact/Via Liners, in Modeling and Simulation of Thng Bang, D., S., McVittie, J., P., Saraswat, K., C., Iacponi, J., A., Gray, J., Krivokapic, Z. edited by Srolovitz., D., J. 1995
  • Rapid Thermal Multiprocessing for a Programmable Factory for Manufacturing of ICs Saraswat, K., C. edited by Rozeboom, F. 1995
  • Comparison of Automated Capacitor Testing Methods for Plasma Charging Induced Damage Abdel-Ati, W., Ma, S., Yang, T., C., McVittie, J., P., Saraswat, K., C. 1995
  • Bias temperature instability in hydrogenated polysilicon thin film transistors Bhat, N., Cao, M., Saraswat, K. 1995
  • Effects of Plant Scale on AM-LCD Amortization Costs McLaughlin, C., Jurichich, S., Wood, S., Saraswat, K. 1995
  • In-situ Ultrasonic wafer Temperature Sensor for RTP Degertekin, L., Dankoski, P., Khuri-Yakub, B., T., Saraswat, K., C. 1995
  • A New Flexible Rapid Thermal Processing System Saraswat, K., C., Chen, Y., Degertekin, L., Khuri-Yaku, B., T. 1995
  • Geometry dependence of polysilicon void formation in deep submicron PBL isolation technologies: evidence of the stress relaxation model Smeys, P., Griffin, P., B., Saraswat, K., C. 1995
  • Toward RTP Control Using Ultrasonic Sensor Dankoski, P., Degertekin, F., L., Khuri-Yakub, B., T., Franklin, G., Saraswat, K., C. 1995
  • High-performance thin-film transistors fabricated by XeCl excimer laser annealing without post-hydrogenation Talwar, S., Cao, M., Kramer, K., J., Saraswat, K., C., Sigmon, T., W. 1994
  • Profile Simulation Studies of Oxide Deposition from Ozone/TEOS Li, J., McVittie, J., P., Ferziger, J., Saraswat, K., C., Schmidt, M., Dobkin, D. 1994
  • Degradation of LPCVD oxides Bhat, N., Saraswat, K. 1994
  • Simulation of Tungsten Etchback for Via and Contact Plugs Hsiau, K., Bang, D., S., McVittie, J., P., Dutton, R., Saraswat, K., C., Tripathi, S. 1994
  • Optimization of a Intermetal Dielectric Deposition Module Using Simulation Li, J., McVittie, J., P., Ferziger, J., Saraswat, K., C., Dong, J. 1994
  • RTP Temperature Sensing - Just How Hot Is It? Dankoski, P., Booth, L., Franklin, G., Saraswat, K., C. 1994
  • Ultrasonic Temperature Measurement in RTP Degertekin, L., Roche, P., E., Honin, B., V., Pei, J., Khuri-Yakub, B., T., Saraswat, K., C. 1994
  • Profile Modeling of Collimated Ti Physical Vapor Deposition Bang, D., S., McVittie, J., P., IslamRaja, M., M., Saraswat, K., C., Kirvokapic, Z., Ramaswami, S. 1994
  • Modeling Ultrathin Dielectric Breakdown on Correlation of Charge Trap-generation and Charge-to-breakdown Apte, Pushkar, P., Saraswat, K., C. 1994
  • A Low Thermal Budget Polycrystalline Silicon Thin Film Transistor Using Chemical Mechanical Polishing Cao, M., Kuehne, S., C., Saraswat, K., C., Wong, S., S. 1994
  • Use of Simulation to Optimize Multistep Intermetal Dielectric Deposition from PECVD and Ozone/TEOS APCVD Processes Li, J., McVittie, J., P., Ferziger, J., Saraswat, K., C. 1994
  • Modeling Studies of Mechanisms in Biased ECR CVD Li, J., McVittie, J., P., Saraswat, K., C., Lassig, S., E. 1994
  • Dynamic Modeling of Collimator Clogging in Physical Vapor Deposition Systems Bang, D., S., McVittie, J., P., IslamRaja, M., M., Saraswat, K., C., Kirvokapic, Z., Ramaswami, S. 1994
  • Adaptable Manufacturing Systems Wood, S., Saraswat, K., C. 1993
  • Computer Aided Design of Rapid Thermal Processors Chen, Y., H., Schaper, C., Saraswat, K., C. 1993
  • Programmable Factory for Adaptable IC Manufacturing Saraswat, K., C., Wood, S., C., Plummer, J., D., Losleben, P. 1993
  • Programmable Factory for IC Manufacturing for the 21st Century Saraswat, K., C. 1993
  • Low Pressure Chemical Vapor Deposition of Si1-x Gex Films Cao, M., Wang, A., W., Saraswat, K., C. 1993
  • Step Coverage Modeling of Physical Vapor Deposition of Ti and WSix Eguchi, Y., Islamraja, M., M., McVittie, J., P., Saraswat, K., C. 1993
  • Thermally Driven In-situ Removal of Native Oxide Using Anhydrous HF Apte, P., Park, H., Helms, C., R., Saraswat, K., C. 1993
  • Performance Evaluation of Adaptable Manufacturing Systems for Semiconductor IC Production Wood, S., Saraswat, K., C. 1993
  • Real-Time Multi-Zone Temperature Control of Rapid Thermal Processing Semiconductor Device Manufacturing Equipment Schaper, C., Moslehi, M., Saraswat, K., Kailath, T. 1993
  • A novel vertical submicron polysilicon TFT Zhao, T., Cao, M., Plummer, J., D., Saraswat, K., C. 1993
  • Hydrogenation of polycrystalline TFTs by ion implantation Cao, M., Zhao, T., Saraswat, K., C., Plummer, J., D. 1993
  • Configuration and Management Strategies for Cluster-Based Fabs Wood, S., Saraswat, K., C. 1993
  • Profile Modeling of Physical Vapor Deposition of Ti and WSix Eguchi, Y., Islamraja, M., M., McVittie, J., P., Saraswat, K., C. 1993
  • In-Situ Acoustic Thermometry of Semiconductor Wafers Degertekin, L., Pei, J., Lee, Y., J., Khuri-Yakub, B., T., Saraswat, K., C. 1993
  • A Low-Thermal-Budget Polycrystalline Silicon-Germanium Thin-Film Transistor Technology for Large-Area Electronics Jurichich, S., King, T., J., Saraswat, K., C., Mehlhaff, J. 1993
  • Modeling of PECVD TEOS Oxide Step Coverage Using an Overhang Structure Chang, C., Y., Saraswat, K., C. 1992
  • Development of Design Rules for Tungsten Plugs Using Simulation Islamraja, M., M., Bariya, A., J., Saraswat, K., C., Cappelli, M., A., McVittie, J., P., Moberly, L. 1992
  • Adaptable Manufacturing Systems for Microelectronics Manufacturing: Economic and Performance Issues Saraswat, K., C., Wood, Samuel, C. 1992
  • Modeling and Simulation of Plasma Enhanced Chemical Vapor Deposition of Silicon Nitride Islamraja, M., M., Bariya, A., J., McVittie, J., P., Cappelli, M., A., Saraswat, K., C., Moberly, L. 1992
  • Rapid Thermal Multeprocessing Using Multivariable Control of a Circularly Symmetric 3 Zone Lamp Apte, P., Saraswat, K., C. 1992
  • MBiCMOS:A Device and Circuit Technique Scalable to the Sub-micron, Sub-2V Regime Raje, P., Ritts, R., Cham, K., Plummer, J., Saraswat, K., C. 1991
  • Modeling the Performance of Cluster-Based Fabs Wood, Samuel, C., Saraswat, K., C. 1991
  • Two Precursor Model for LPCVD of Oxide from TEOS Islamraja, M., Mazhar, Chang, C., Y., McVittie, J., P., Cappelli, M., C., Saraswat, K., C. 1991
  • Dynamics and Control of Rapid Thermal Processing Schaper, C., Cho, Y., Guigui, P., Hoffman, G., Norman, S., Parks, P., Saraswat, K. 1991
  • Factors Affecting the Economic Performance of Cluster-Based Fabs Wood, Samuel, C., Saraswat, K., C. 1991
  • PECVD Oxide Step Coverage Experiment andd Simulation Chang, C., Y., Islamraja, M., M., McVittie, J., P., Saraswat, K., C. 1991
  • Temperature Uniformity Optimization Using Three Zone Lamp and Dynamic Control in A Rapid Thermal Multiprocessor Apte, P., Wood, S., Booth, L., Saraswat, K., C., Moslehi, M., M. 1991
  • Low Temperature In-Situ Native Oxide Removal Using Anhydrous Hydrogen Fluoride Apte, P., Moslehi, M., M., Yeakley, R., Saraswat, K., C. 1991
  • Silicon Epitaxy Following Low Temperature Gas-Phase Removal of Native Oxide Using Anhydrous Hydrogen Fluoride Apte, P., Moslehi, M., M., Yeakley, R., Saraswat, K., C. 1991
  • A General Analytical Model for Low Pressure Deposition in 3--D Structures Islamraja, M., M., McVittie, J., P., Cappelli, M., Saraswat, K., C. 1991
  • Non-Invasive Process Temperature Monitoring Using Laser-Acoustic Technique Lee, Y., J., Chou, C., H., Khuri-Yakub, B., T., Saraswat, K., C. 1990
  • Pyrometer Modeling for Rapid Thermal Processing Wood, S., Apte, P., P., King, T., J., Moslehi, M., M., Saraswat, K., C. 1990
  • CVD Modeling Using SPEEDIE Rey, J., C., Cheng, L.-Y., McVittie, J., P., Saraswat, K., C. 1990
  • Simulations of LPCVD Profiles Saraswat, K., C., Wulu, H., C., Rey, J., C., Islamraja, M., M., Cheng, L., Y., McVitti, J., P. 1990
  • Sticking Coefficient as a Single Parameter to Characterize Step Coverage of SiO2 Processes Cheng, L., Y., Rey, J., C., McVittie, J., P., Saraswat, K., C. 1990
  • Economic Impact of Single Wafer Multiprocessors Wood, S., Apte, P., P., Saraswat, K., C., Harrison, J., M. 1990
  • SPEEDIE Simulation of Profile Evolution During Etching and Deposition McVittie, J., P., Bariya, A., J., Rey, J., C., Ravi, S., Saraswat, K., C., Raja, M., M.Islam 1990
  • Noncontacting Acoustic Based Temperature Measurement Technique in Rapid Thermal Processing Lee, Y., J., Chou, C., Khuri-Yakub, B., T., Saraswat, K., C. 1990
  • Numerical Simulations of CVD Trench Filling Using a Surface Reaction Coefficient Model Rey, J., C., Cheng, L., Y., McVittie, J., P., Saraswat, K., C. 1990
  • BiCMOS Gate Performance Optimization Using Unified Delay Model Raje, P., Cham, K., Saraswat, K., C. 1990
  • Modeling of Submicron Dry Etching Technology Using SUPREM-IV and SPEEDIE Uhm, K., S., Chin, G., Dutton, R., W., McVittie, J., P., Saraswat, K., C. 1990
  • Photo-Acoustic Measurements of Silicon Wafers Processing Temperatures Lee, Y., J., Chou, C., H., Khuri-Yakub, B., T., Saraswat, K., C., Moslehi, M., M. 1989
  • Single Wafer In-situ Multiprocessing Saraswat, K., C., Wright, P., Wood, S., Moslehi, M., M. 1989
  • Modeling and Measurement of CVD SiO2 Step Coverage Cheng, L., Y., McVittie, J., P., Saraswat, K., C. 1989
  • Tungsten and Tungsten Shunted Polysilicon Gate Submicron CMOS Technology Wong, M., Saraswat, K., C. 1989
  • Single Wafer Rapid Thermal Multiprocessing: A New Concept in Manufacturing Saraswat, K., C., Moslehi, M., M., Grossman, D., D., Wood, S., Wright, P., Booth, L. 1989
  • Rapid Thermal Multiprocessing for Micro Factories Saraswat, K., C., Booth, L., Grossman, D., D., Khuri-Yakub, B., T., Lee, Y., J., Moslehi, M., M. 1989
  • ELECTRICAL CHARACTERISTICS AND IRRADIATION SENSITIVITY OF IGFETS WITH RAPIDLY GROWN ULTRATHIN GATE DIELECTRICS Wright, P. J., Moslehi, M. M., Saraswat, K. C. IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC. 1988: 2438-2439
  • THE DEPOSITION OF N-TYPE AND P-TYPE INSITU DOPED POLYSILICON BY LPCVD Gan, J., Chu, C., McVittie, J. P., Saraswat, K. C., Swanson, R. M. ELECTROCHEMICAL SOC INC. 1988: C377-C377
  • Fundamental Factors Governing Improved Performance of Al-Si/Ti Multilayer Metallization for VLSI Joshi, A., Hu, H., S., Gardner, D., Saraswat, K., C. 1988
  • A Complete RLC Transmission Line Model of Interconnect Delay Schreyer, T., A., Nishi, Y., Saraswat, K. 1988
  • CVD W Film Stress and Calculation of Stress on p-n Junction Edge Leakage Wulu, H., C., Gardner, D., Saraswat, K., C. 1988
  • Multilayered Interconnections for VLSI Gardner, D., Saraswat, K., C. 1988
  • SUBMICROMETER IGFET FABRICATION BY RAPID THERMAL-PROCESSING Moslehi, M. M., Wright, P. J., Saraswat, K. C. IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC. 1987: 2365-2365
  • THE EFFECT OF A SUPERCONDUCTING INTERCONNECT ON CIRCUIT PERFORMANCE SCHREYER, T. A., Wright, P. J., Saraswat, K. C. IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC. 1987: 2386-2387
  • THE VIRTUAL WAFER FAB MODELING SYSTEM LEEKE, S. D., Davies, B., Saraswat, K. ELECTROCHEMICAL SOC INC. 1987: C448-C448
  • SELECTIVE AND NONSELECTIVE LPCVD OF TUNGSTEN IN A NOVEL RAPID THERMAL-PLASMA REACTOR Moslehi, M. M., Saraswat, K. C. ELECTROCHEMICAL SOC INC. 1987: C477-C478
  • THE EFFECTS OF CHEMICAL OXIDE ON THE DEPOSITION OF TUNGSTEN BY THE SILICON REDUCTION OF TUNGSTEN HEXAFLUORIDE Wong, M., Kobayashi, N., Browning, R., Paine, D., Saraswat, K. C. ELECTROCHEMICAL SOC INC. 1987: C477-C477
  • SHIPS - HIGH-LEVEL PROCESS SIMULATION FOR VLSI MANUFACTURING LEEKE, S. D., Saraswat, K. ELECTROCHEMICAL SOC INC. 1987: C447-C447
  • The Effects of Chemical Oxide on the Deposition of Tungsten by the Silicon Reduction of Tungsten Hexaflouride Wong, M., Kobayashi, N., Browning, R., Paine, D., Saraswat, K., C. 1987
  • Technology and Modeling of Submicron Contacts Wright, P., Loh, W., Fu, C., C., Dameron, D., Saraswat, K., C. 1987
  • SHIPS: High-level Process Simulation for VLSI Manufacturing Leeke, S., Saraswat, K. 1987
  • In-situ MOS Gate Engineering in a Novel Rapid Thermal/Plasma Multiprocessing Reactor Moslehi, M., Wong, M., Saraswat, K., Shatas, S. 1987
  • VLSI Interconnections Technology, Present and Future Saraswat, K., C. 1987
  • Technology and Modeling of Submicron Contacts Wright, P., Loh, W., Fu, C., C., Dameron, D., Saraswat, K., C. 1987
  • Manufacturing Technology Modeling Saraswat, K., C., Davies, B., Harrison, M., Leeke, S., D., Lukaszek, W., Mcvittie, J. 1987
  • THE SIDEWALL RESISTOR - A NOVEL TEST STRUCTURE TO RELIABLY EXTRACT SPECIFIC CONTACT RESISTIVITY Loh, W. M., Wright, P. J., SCHREYER, T. A., SWIRHUN, S. E., Saraswat, K. C., Meindl, J. D. IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC. 1986: 1855-1856
  • A PHYSICAL MODEL FOR SI OXIDATION-KINETICS IN THE THICKNESS RANGE FROM 30A TO 1 MU-M Han, C. J., Helms, C. R. ELECTROCHEMICAL SOC INC. 1986: C101-C101
  • Rapid Thermal Oxidation of Silicon Moslehi, M., Shatas, S., C., Saraswat, K., C. 1986
  • Interconnections for VLSI Saraswat, K., C. 1986
  • Measurement and Extraction of Specific Contact Resistivity Saraswat, K., C., Loh, W., Schreyer, T., Swirhun, S. 1986
  • Rapid thermal oxidation and nitridation of silicon Moslehi, M., Shatas, S., C., Saraswat, K., C. 1986
  • THE ROLE OF STRESS IN TWO-DIMENSIONAL SILICON OXIDATION Kao, D. B., Saraswat, K. C., McVittie, J. P., Nix, W. D. IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC. 1985: 2530-2531
  • CHARACTERIZATION OF THERMALLY NITRIDED SIO2 USING AUGER SPUTTER PROFILING Han, C. J., Moslehi, M. M., Helms, C. R., Saraswat, K. C. A V S AMER INST PHYSICS. 1985: 804-805
  • Thermal and Microwave Nitrogen Plasma Nitridation Techniques for Ultrathin Gate Insulators of MOS VLSI Moslehi, M., Fu, C., Y., Saraswat, K., C. 1985
  • Refractory Metals and Silicides for VLSI Applications Saraswat, K., C. 1985
  • Rapid Thermal Nitridation of Si and SiO2 in Ammonia Moslehi, M., Saraswat, K., C., Shatas, S. 1985
  • Application of Tungsten Silicide/N+ Polysilicon Technology for VLSI Deal, M., Pramanik, D., Saxena, A., N., Saraswat, K., C. 1985
  • Homogeneous and Layered Films of Al/Si with Ti for Multilevel Interconnections Gardner, D., Michalka, T., L., Flinn, P., A., Saraswat, K., C., Meindl, J., D. 1985
  • Rapid Thermal Nitridation of SiO2 for Nitroxide Thin Dielectrics Moslehi, M., Saraswat, K., C. 1985
  • Material Studies of Silicon Nitride Films Grown in Microwave Nitrogen Plasma Fu, C., Y., Moslehi, M., M., Saraswat, K., C. 1985
  • Microstructural Characterization of LPCVD Tungsten Interfaces Paine, D., C., Bravman, J., C., Saraswat, K., C. edited by Blewer, R., S. 1985
  • SELECTIVE CVD OF TUNGSTEN FOR VLSI TECHNOLOGY Saraswat, K. C., Swirhun, S., McVittie, J. P. ELECTROCHEMICAL SOC INC. 1984: C86-C86
  • PROPERTIES AND DEPOSITION OF LOW-PRESSURE CVD TUNGSTEN-SILICON FILMS MONNIG, K. A., BRORS, D. L., Fair, J. A., CONEY, W., Saraswat, K. C. IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC. 1984: 1965-1966
  • DEPOSITION PARAMETERS AND CHARACTERISTICS OF LOW-PRESSURE CVD TUNGSTEN SILICIDE BRORS, D. L., Fair, J. A., MONNIG, K. A., Saraswat, K. C. ELECTROCHEMICAL SOC INC. 1984: C93-C93
  • HYDROGENATION BY ION-IMPLANTATION FOR VLSI/SOI APPLICATIONS Singh, H. J., Saraswat, K. C., Meindl, J. D. IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC. 1984: 1981-1982
  • DIFFICULTIES WITH THE LAG-TIME MEASUREMENT OF OXYGEN DIFFUSION IN THERMALLY GROWN SIO2 Han, C. J., Helms, C. R. ELECTROCHEMICAL SOC INC. 1984: C318-C318
  • Studies of Trapping and Conduction in Ultrathin SiO2 Gate Insulators Moslehi, M., Saraswat, K., C. 1984
  • High Performance Latchup Free CMOS Swirhun, S., Sangiorgi, E., Weeks, A., Rafferty, M., Pinto C., Saraswat, K., Dutton, R. 1984
  • Ultrathin Thermal Silicon Nitride and Nitroxide Insulators for VLSI Moslehi, M., Saraswat, K., C. 1984
  • Al Alloys with Ti, W and Cu for Multilayer Interconnections Gardner, D., Michalka, T., Saraswat, K., McVittie, J., Barbee Jr., T., Meindl, J. 1984
  • ALUMINUM-ALLOYS WITH TITANIUM, TUNGSTEN, AND COPPER FOR MULTILAYER INTERCONNECTIONS Gardner, D., MICHALKA, T., Saraswat, K., McVittie, J., Barbee, T., Meindl, J. IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC. 1984: 1965-1965
  • THERMAL NITRIDATION OF SILICON IN A COLD WALL REACTOR MOSLEHI, M., Saraswat, K. C. ELECTROCHEMICAL SOC INC. 1983: C79-C79
  • Refractory Materials for Interconnections in VLSI Saraswat, K., C. 1983
  • Annealing of Oxide Fixed Changes in Scaled Polysilicon Gate MOS Structures Kao, D., B., Saraswat, K., C., McVittie, J., P. 1983
  • Electrical Characteristics of Devices Fabricated with Ultrathin Thermally-Grown Silicon Nitride and Nitroxide Gate Insulators Moslehi, M., Saraswat, K., C. 1983
  • WSI, INTERCONNECTIONS FOR VERY-LARGE-SCALE INTEGRATED-CIRCUITS Saraswat, K. C. ELSEVIER SCIENCE SA LAUSANNE. 1981: 143-144
  • THERMAL-OXIDATION OF HEAVILY DOPED POLYCRYSTALLINE SILICON THIN-FILMS Singh, H., Saraswat, K. C. ELECTROCHEMICAL SOC INC. 1981: C103-C103
  • Circuit Scaling Limits for Ultra-Large-Scale Integration Meindl, J., D., Ratnakumar, N., K., Gerzberg, L., Saraswat, K., C. 1981
  • Physical and Electrical Properties of Polycrystalline Silicon Thin Films Saraswat, K., C. 1981
  • The Process Dependence of the Electrical Resistivity of LPCVD Polycrystalline Silicon Films Liu, C., M., Khambaty, M., Saraswat, K., C. 1981
  • Thermal Oxidation of Tantalum Silicide Deposited by Cosputtering Saraswat, K., C., Nowicki, R., S., Moulder, J., F. 1981
  • WSi2 Interconnections for VLSI Saraswat, K., C. 1981
  • EFFECT OF ANNEALING ON THE ELECTRICAL-PROPERTIES OF POLYCRYSTALLINE SILICON MANDURAH, M. M., Saraswat, K. C., Helms, C. R., Kamins, T. I. ELECTROCHEMICAL SOC INC. 1980: C386-C386
  • OXIDATION STUDIES OF WSI2 AND PDSI FORMED BY SCANNED LASER-BEAM REACTION Shibata, T., Sigmon, T. W., Gibbons, J. F., Mohammadi, F., Saraswat, K. C. IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC. 1980: 2199-2200
  • FORMATION OF WSI2 BY CVD OF TUNGSTEN ON SILICON Saraswat, K. C., Mohammadi, F. ELECTROCHEMICAL SOC INC. 1980: C95-C95
  • Thermal Oxidation of Sputtered thin Films of WSi2 Mohammadi, F., Saraswat, K.C., K.C., Meindl, J., D. 1980
  • APPLICATION OF AC TECHNIQUES TO THE STUDY OF LITHIUM DIFFUSION IN WO3 THIN-FILMS Ho, C., Raistrick, I. D., Huggins, R. A. ELECTROCHEMICAL SOC INC. 1979: C123-C123
  • SILICIDE FORMATION BY LASER-HEATING OF SPUTTERED REFRACTORY-METAL FILMS ON SILICON Mohammadi, F., Saraswat, K. C., Beaudouin, J., Meindl, J. D. ELECTROCHEMICAL SOC INC. 1979: C124-C124
  • INITIAL TRANSIENTS IN THE SI DEPOSITION PROCESS Reif, R., Vanzi, M., DUTTON, R. W., Kamins, T. I., Saraswat, K. C. ELECTROCHEMICAL SOC INC. 1979: C368-C368
  • SILICIDE FORMATION USING A CW SCANNED ELECTRON-BEAM Regolini, J. L., Sigmon, T. W., Gibbons, J. F., Lau, S. S., Mayer, J. W. ELECTROCHEMICAL SOC INC. 1979: C348-C348
  • DOPANT SEGREGATION IN POLYCRYSTALLINE SILICON MANDURAH, M. M., Saraswat, K. C., Kamins, T. I. ELECTROCHEMICAL SOC INC. 1979: C369-C369
  • Physical Properties of Steam Oxidized WSi2 Mohammadi, F., Rouse, J., Saraswat, K., C., Helms, R. 1979
  • BORON DIFFUSIVITY IN 100 AND 111 SILICON UNDER OXIDATION CONDITIONS - STUDY OF OXIDATION-ENHANCED DIFFUSIVITY Antoniadis, D. A., Lin, A., Gonzalez, A. IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC. 1978: 1358-1358
  • MODEL FOR DOPANT INCORPORATION INTO SILICON EPITAXIAL-FILMS Reif, R., Saraswat, K. C., Kamins, T. I. ELECTROCHEMICAL SOC INC. 1978: C135-C135
  • THERMOPHORETIC DEPOSITION OF SMALL PARTICLES IN MCVD PROCESS Walker, K. L., Homsy, G. M., Nagel, S. R., GEYLING, F. T. ELECTROCHEMICAL SOC INC. 1978: C469-C469
  • Model for Dopant Incorporation into Silicon Epitaxial Films Reif, R., Kamins, T., I., Saraswat, K., C. 1978
  • IC PROCESS ENGINEERING MODELS AND APPLICATIONS GONZALEZ, A. G., Antoniadis, D. A., RUNG, R. D., DUTTON, R. W. ELECTROCHEMICAL SOC INC. 1977: C119-C119
  • TRANSIENT AND STEADY-STATE RESPONSE OF DOPANT SYSTEM OF AN EPITAXIAL REACTOR - GROWTH-RATE DEPENDENCE Reif, R., Saraswat, K. C. ELECTROCHEMICAL SOC INC. 1977: C308-C309
  • EPITAXIAL SILICON GROWTH ON ION-IMPLANTED SILICON Saraswat, K. C., Meindl, J. D. ELECTROCHEMICAL SOC INC. 1977: C106-C107
  • TRANSIENT-RESPONSE OF DOPANT INCORPORATION INTO SILICON EPITAXIAL-FILMS Kamins, T. I., Reif, R., Saraswat, K. C. ELECTROCHEMICAL SOC INC. 1976: C261-C261